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All Journal International Journal of Power Electronics and Drive Systems (IJPEDS)
Nakka, Jayaram
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Control & Systems Engineering Electrical & Electronics Engineering

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Controlling the significance of BLDC motor internal faults using dual examine algorithm in electric vehicle applications Gaurav, Gaurav; Nakka, Jayaram; Obulesu, Dakka; Arandhakar, Sairaj
International Journal of Power Electronics and Drive Systems (IJPEDS) Vol 14, No 4: December 2023
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/ijpeds.v14.i4.pp1946-1954

Abstract

This paper presents dual examine algorithm (DEA) to reduce residual error as well as to provide accurate phase currents without any distortion for a closed loop brushless direct current (BLDC) motor of an electric vehicle (EV). The underlying technology of DEA is a hybrid of the tabu search optimization (TSO) method and the genetic algorithm (GA). During closed loop operation of BLDC motor residual error is introduced by the discrepancy between the actual and reference speed, and the phase current distortion lowers the efficiency of the machine as a result machine performance is degraded. To address these issues, GA algorithm calculates the necessary parameters for the controller to produce precise current without distortion based on stator phase currents, and the suggested TSO algorithm limits the repeated operations in the PID controller to reduce the residual error to the greatest degree feasible. After primary examining, dual examine process initiate the transposing operation such as TSO is used to prove and calculate the phase current controller parameters, and GA is used to correct for remaining inaccuracy. To validate the proposed DEA algorithm is compared with advanced particle swarm optimization (APSO). The results verified the superiority of proposed DEA algorithm using MATLAB/Simulink platform.
Co-Authors Arandhakar, Sairaj Gaurav, Gaurav Obulesu, Dakka