Singh, Raghvendra Pratap
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Minimization of the circuit components with modified cascaded multilevel inverter topology Singh, Raghvendra Pratap; Nigam, Prateek; Thakre, Kishor
International Journal of Applied Power Engineering (IJAPE) Vol 13, No 4: December 2024
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/ijape.v13.i4.pp798-807

Abstract

This article examines a modified multilevel inverter circuit that uses basic units connected in cascade. The suggested circuit can be used with an inverter that is symmetrical or asymmetric. The magnitude of the DC voltage source is determined using a variety of methods in order to generate a large number of voltage levels. For both symmetrical and asymmetrical configurations, the magnitude of two DC sources in basic units can be used. The DC voltage source's magnitude is the same for each unit in the symmetrical configuration. However, in an asymmetrical configuration, the value of the DC source for the fundamental units is inequitable, and their magnitudes are obtained using various techniques. Comparison study demonstrates that the suggested circuit requires minimum components, reduces power loss, and boosts inverter efficiency. Additionally, in comparison to modern topologies, the standing voltage across the switches is acceptable. To verify the effectiveness of the investigated topology, simulation results for 15, 17, 23, and 31-level inverters are analysed.