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Prajapati, Pankaj P.
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Electrical & Electronics Engineering

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Performance analysis of CMOS based analog circuit design with PVR variation Prajapati, Pankaj P.; Kshatriya, Anilkumar J.; Bharvad, Sureshbhai L.; Upadhyay, Abhay B.
Bulletin of Electrical Engineering and Informatics Vol 12, No 1: February 2023
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/eei.v12i1.4357

Abstract

Process, supply voltage, and temperature (PVT) are three important factors which contribute to performance variation of the complementary metal–oxide–semiconductor (CMOS) based analog circuits. In this paper, CMOS based analog circuit design with the PVT variation effects are explored. The effects of the PVT variation on the performance of CMOS based analog circuits are introduced. The optimization of CMOS based analog circuits such as differential amplifier (DA) and two-stage operational amplifier (op amp) circuits with PVT variations with different algorithms such as cockoo search (CS), particle swam optimization (PSO), hybrid CSPSO, and differential evaluation (DE) algorithms is presented. Each algorithm is implemented using the C programming language, interfaced with Ngspice circuit simulator, and tested on the Intel®core™ i5, 2.40 GHz processor with 8 GB internal RAM using the Ubuntu operating system (OS). The result shows PVT variation affects the performance of CMOS circuit.
Comparative analysis of meta heuristics algorithm for differential amplifier design Prajapati, Pankaj P.; Kshatriya, Anilkumar J.; Patel, Dhavalkumar N.; Gonsai, Sima K.; Tank, Hardik B.; Sheth, Kinjal R.
Bulletin of Electrical Engineering and Informatics Vol 12, No 6: December 2023
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/eei.v12i6.6153

Abstract

The design of analog circuits is very essential for the development of system design based on electronics as the world is analog in nature. Furthermore, performance of emerging products depends on analog circuits for reduction of power dissipation and improvement of speed. Though in the system on chip (SoC) analog circuit consumes less, it is more complex to design it due to the analog circuit nature complexity. The job of the evolutionary algorithm (EA) in the process of optimization of an analog circuit based on complementary metal oxide semiconductor (CMOS) is to get the appropriate values that can be used for the design parameters of the given circuit in such a way such that all the targeted specification of the given circuit can be obtained. The chaotic serial particle swarm optimization (CSPSO) and cuckoo search (CS) algorithms are lower than to those found through the particle swarm optimization (PSO) and differential evolution (DE) algorithms. The CS algorithm obtained all the desired specifications with less power dissipation and the least total transistor area compared to those attained by the DE and PSO algorithms.
Co-Authors Bharvad, Sureshbhai L. Gonsai, Sima K. Kshatriya, Anilkumar J. Patel, Dhavalkumar N. Sheth, Kinjal R. Tank, Hardik B. Upadhyay, Abhay B.