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All Journal JEITECH (JOURNAL OF ELECTRICAL ENGINEERING AND INFORMATION TECHNOLOGY)
Pramesty, Kinkin Ayu Pramesty
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Computer Science & IT Control & Systems Engineering Electrical & Electronics Engineering Engineering

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Rancang Bangun Modul Percobaan Gerbang Logika Dan Flip-Flop Di Labolatorium Elektronika Dan Digital Fakultas Teknik Elektro Universitas Mataram Pramesty, Kinkin Ayu Pramesty; Darmawan, Budi; Ch, Syafaruddin
JEITECH (JOURNAL OF ELECTRICAL ENGINEERING, INFORMATION TECHNOLOGY, CONTROL ENGINEERING, AND ROBOTIC) Vol. 2 No. 2 (2024): Edisi July 2024
Publisher : Depertment of Electrical Engineering University of Mataram

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Abstract

This research aims to deepen understanding of theory in lectures through practicum. The practicum module was created to facilitate data retrieval during a practicum at the Electronics and Digital Laboratory, Faculty of Electrical Engineering, University of Mataram, which was realized in the design of the logic gate and flip-flop experiment module, based on the logic gate and flip-flop experiment module, on logic gates using 7 IC namely AND gate (IC 7408), OR gate IC (IC 7432), NOT gate IC (IC 7404), NAND gate IC (IC 7400), NOR gate IC (IC 7402), XOR gate IC (IC 7486), XNOR gate IC (IC 74266), resistors, led indicators, and switches, on Flip-Flops using 2 logic gate ICs namely NOT gate IC (IC 7404), NAND gate IC (IC 7400), and a JK Flip- Flops (IC 7476), and clocks that use push buttons that have been connected to Arduino, resistors, led indicators, and switches, from the designed modules, the results show that the logic gates and flip-flop experiments are by the experimental steps and the truth table his.
Co-Authors Budi Darmawan Syafaruddin Ch