International Journal of Electrical and Computer Engineering
Vol 9, No 3: June 2019

CMOS ring oscillator delay cell performance: a comparative study

D. A. Hadi (Universiti Teknikal Malaysia Melaka)
A. Z. Jidin (Universiti Teknikal Malaysia Melaka)
N. Ab Wahab (Universiti Teknikal Malaysia Melaka)
Madiha Z. (Universiti Teknikal Malaysia Melaka)
Nurliyana Abd Mutalib (Universiti Teknikal Malaysia Melaka)
Siti Halma Johari (Universiti Teknikal Malaysia Melaka)
Suziana Ahmad (Universiti Teknikal Malaysia Melaka)
M. Nuzaimah (Universiti Teknikal Malaysia Melaka)



Article Info

Publish Date
01 Jun 2019

Abstract

A common voltage-controlled oscillator (VCO) architecture used in the phase locked loop (PLL) is the ring oscillator (RO). RO consist of number of inverters cascaded together as the input of the first stage connected to the output of the last stage. It is important to design the RO to be work at desired frequency depend on application with low power consumption. This paper presents a review the performance evaluation of different delay cell topologies the implemented in the ring oscillator. The various topologies analyzed includes current starved delay cell, differential delay cell and current follower cell. Performance evaluation includes frequency range, frequency stability, phase noise and power consumption had been reviewed and comparison of different topologies has been discussed. It is observed that starved current delay cell have lower power consumption and the different of the frequency range is small as compared to other type of delay cell.

Copyrights © 2019






Journal Info

Abbrev

IJECE

Publisher

Subject

Computer Science & IT Electrical & Electronics Engineering

Description

International Journal of Electrical and Computer Engineering (IJECE, ISSN: 2088-8708, a SCOPUS indexed Journal, SNIP: 1.001; SJR: 0.296; CiteScore: 0.99; SJR & CiteScore Q2 on both of the Electrical & Electronics Engineering, and Computer Science) is the official publication of the Institute of ...