A design of the proposed VCO was developed for PLL in radio frequency identification (RFID) application. By using current starved ring oscillator, the designed circuit is simulated using 0.18-μm CMOS process in Mentor Graphics environment. The results show that the voltage drawn is around 5V supplied at VDD, and the product of this current and voltage has approximate 105.3 mW power consumption while the VCO generates 212 MHz at 1.4 V.
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