Three-Stage Amplifier Adopting Dual-Miller with Nulling-Resistor and Dual-Feedforward Techniques

Zhou Qianneng (Chongqing University of Posts and Telecommunications)
Li Qi (Chongqing University of Posts and Telecommunications)
Li Chen (Chongqing University of Posts and Telecommunications)
Lin Jinzhao (Chongqing University of Posts and Telecommunications)
Li Hongjuan (Chongqing University of Posts and Telecommunications)
Li Yunsong (Chongqing University of Posts and Telecommunications)
Pang Yu (Chongqing University of Posts and Telecommunications)
Li Guoquan (Chongqing University of Posts and Telecommunications)
Cai Xuemei (Chongqing University of Posts and Telecommunications)

Indonesian Journal of Electrical Engineering and Computer Science
Vol 12, No 8: August 2014

A high-gain wide-bandwidth three-stage amplifier, which employs dual-miller compensation with nulling-resistor and dual-feedforward compensation (DMCNR-DFC), is designed and analyzed in this paper. By adopting the technique of DMCNR-DFC, the designed three-stage amplifier achieves well performance including gain-bandwidth product (GBW) and slew rate (SR). The improved DMCNR-DFC three-stage amplifier is designed and simulated in 0.5μm BCD process. Simulation results show that DMCNR-DFC three-stage amplifier achieves a dc gain of about 121.1dB and GBW of about 6.1MHz with 52º phase margin using a 5-V power supply voltage.