Study of Small Signal of 4H-SiC Static Induction Transistor

Gang Chen (Science and Technology on Monolithic Integrated Circuits and Modules Laboratory)
Yang Lu (Nanjing Electronic Devices Institute)
Li Li (Nanjing Electronic Devices Institute)
Song Bai (Science and Technology on Monolithic Integrated Circuits and Modules Laboratory)
Yun Li (Science and Technology on Monolithic Integrated Circuits and Modules Laboratory)
Haiyan Lu (Science and Technology on Monolithic Integrated Circuits and Modules Laboratory)

Indonesian Journal of Electrical Engineering and Computer Science
Vol 11, No 5: May 2013

Silicon carbide (SiC) SITs were fabricated using home-grown epi structures. The gate is a recessed gate - bottom contact (RG - B). We designed that the mesa space 2.5 μm and the gate channel is 1.5 μm. One cell has 400 source fingers and each source finger width is 50 μm. 0.5 mm gate periphery SiC SIT yielded a maximum drain current density of 160 mA/mm at a drain voltage of 80 V and a gate voltage of 2.5 V. The device blocking voltage with a gate bias of -16 V was 400 V. Packaged 0.5-mm devices were evaluated using amplifier circuits designed for class AB operations. Small signal of SIT was studied. the maximum stable gain (MSG) were 11.2 dB at 500MHz and 7.85 dB at L band 1 GHz with Vds = 80V and Vg = 2V. DOI: http://dx.doi.org/10.11591/telkomnika.v11i5.2559