International Journal of Power Electronics and Drive Systems (IJPEDS)
Vol 9, No 1: March 2018

FPGA Based Selective Harmonic Elimination Technique for Multilevel Inverter

T. Porselvi (Sri Sai Ram Engineering College)
K. Deepa (Amrita School of Engineering)
R. Muthu (SSN College of Engineering)



Article Info

Publish Date
01 Mar 2018

Abstract

Harmonic elimination at the fundamental frequency is very much appropriate for high and medium range of power generation and applications. This paper considers a new technique for selective harmonic elimination (SHE), in which the total harmonic distortion (THD) is minimized when compared with that of the conventional one. With this technique, the harmonics at lower order are eliminated, which are more predominant than the higher ones.Cascaded H-Bridge inverter fed by a single DC is considered which is simulated with the switching angles generated by both the conventional method of SHE and the new method of SHE. The simulated results of the load voltage and the waveforms of the harmonic analysis are shown. The THD values are compared for the two techniques.  The experimental results are also shown for the new technique. The switching angles are generated with the help of field programmable gated array (FPGA) in the hardware. The value of experimental THD of voltage is compared with that of simulated THD and the comparison prove that the results are satisfactory.

Copyrights © 2018






Journal Info

Abbrev

IJPEDS

Publisher

Subject

Control & Systems Engineering Electrical & Electronics Engineering

Description

International Journal of Power Electronics and Drive Systems (IJPEDS, ISSN: 2088-8694, a SCOPUS indexed Journal) is the official publication of the Institute of Advanced Engineering and Science (IAES). The scope of the journal includes all issues in the field of Power Electronics and drive systems. ...