Design of Full-bridge DC-DC Converter 311/100 V 1kW with PSPWM Method to Get ZVS Condition

Toni Prasetya (Departement of Electrical Engineering and Information Technology, Faculty of Engineering, Universitas Gadjah Mada)
F. Danang Wijaya (Departement of Electrical Engineering and Information Technology, Faculty of Engineering, Universitas Gadjah Mada)
Eka Firmansyah (Departement of Electrical Engineering and Information Technology, Faculty of Engineering, Universitas Gadjah Mada)

International Journal of Power Electronics and Drive Systems (IJPEDS)
Vol 8, No 1: March 2017

Enhancing the switching frequency can increase the power density of a fullbridge dc-dc converter. However, power loss in switches will increase due to the intersection of voltage and current during turn-on and turn-off transition process. The switching power loss can be reduced by making the condition of zero voltage switching (ZVS) which in this study is obtained by using the phase-shifted PWM method. Achieving this condition requires appropriate parameters such as deadtime, leakage inductance, and the primary current of transformer in sufficient value. In this study, ZVS is achieved when the transformer leakage inductance of 14.12 μH is added with external inductance of 24.29 μH which is installed in series with transformer and when the primary current of transformer is more than 1.289 A.