Indonesian Journal of Electrical Engineering and Computer Science
Vol 22, No 1: April 2021

Efficient TCAM design based on dual port SRAM on FPGA

Triet Nguyen (Ho Chi Minh City University of Technology)
Kiet Ngo (Ho Chi Minh City University of Technology)
Nguyen Trinh (Ho Chi Minh City University of Technology)
Bao Bui (Ho Chi Minh City University of Technology)
Linh Tran (Ho Chi Minh City University of Technology)
Hoang Trang (Ho Chi Minh City University of Technology)



Article Info

Publish Date
01 Apr 2021

Abstract

Ternary content addressable memory (TCAM) is a memory that allows high speed searching for data. Not only it is acknowledged as associative memory/storage but also TCAM can compare input searching content (key) against a collection of accumulated data and return the matching address which compatible with this input search data. SRAM-based TCAM utilizes and allocates blocks RAM to perform application of TCAM on FPGA hardware. This paper presents a design of 480×104 bit SRAM-based TCAM on altera cyclone IV FPGA. Our design achieved lookup rate over 150 millions input search data and update speed at 75 million rules per second. The architecture is configurable, allowing various performance trade-offs to be exploited for different ruleset characteristics.

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