A proposed asymmetrical configuration of cascaded multilevel inverter topology for high level generation

Lipika Nanda (Kalinga Institute of Industrial Technology)
Chitralekha Jena (Kalinga Institute of Industrial Technology)
Arjyadhara Pradhan (Kalinga Institute of Industrial Technology)
Babita Panda (Kalinga Institute of Industrial Technology)

International Journal of Power Electronics and Drive Systems (IJPEDS)
Vol 13, No 1: March 2022

Multilevel inverters are having high demand in high power applications. It works in medium voltage range. In this converter, for specific time intervals fewer switches will be conducting so switching loss is also reduced. This paper represents overall total harmonic distortion (THD) for different levels and different carrier frequencies. Switching loss, conduction loss of inverter has been discussed and hence inverter efficiency can be calculated. Phase displacement pulse width modulation method has been proposed in order to generate pulses. The proposed topology is well presented by its practical implementation with two current direct sources. All the simulations are being carried out using MATLAB/Simulink platform to validate the hardware results.