Indonesian Journal of Cybersecurity and Emerging Risks
Vol. 1 No. 2 (2026): 2026: IJCYBER Volume 1 Issue 2 Year 2026

Ensuring High Performance During Implementation of Security Algorithms on FPGA

Neeraj Bisht (Unknown)
Shilpi Bisht (Birla Institute of Applied Sciences, Bhimtal)
Sandeep K. Budhani (Unknown)



Article Info

Publish Date
31 May 2026

Abstract

Cryptography has evolved into an indispensable component of modern technology. To ensure the safety and security of our critical data, which is easily accessible with a single click, it is critical to choose. In addition, comparative research is conducted using the experimental results for various critical adequate, efficient, and viable cryptographic methods. Two widely used cryptography algorithms are the Advanced Encryption Standard and the Data Encryption Standard. The AES and DES algorithms are implemented in FPGA for the Kintex-7 Low voltage at three different frequencies in this study. This research aims to determine which cryptographic method consumes the least amount of power and occupies the least amount of space. It is observed through experimental results that DES consumed 501% more total on-chip power; produced 9.8 % higher junction temperature; required 513 % more Slice LUTs, 294% more Slice Registers, and 373 % more Slices than AES implementation for Kintex-7 Low Voltage at 1.6 GHz frequency. This study indicates that the AES implementation for the Kintex-7 Low Voltage at 1.6 GHz was the most energy and area efficient algorithm, outperforming the DES implementation for the same setup.

Copyrights © 2026






Journal Info

Abbrev

ijcyber

Publisher

Subject

Description

ndonesian Journal of Cybersecurity and Emerging Risks (IJCYBER, Indones. J. Cybersecur. Emerg. Risks, e-ISSN 3164-7782) is a peer-reviewed international journal dedicated to advancing research on theoretical developments and practical implementations in the dynamic fields of cybersecurity, digital ...