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International Journal of Electrical and Computer Engineering
Published by Institute of Advanced Engineering and Science
ISSN : 20888708     EISSN : 27222578     DOI : -
Core Subject : Science, Engineering,
Computer Science & IT Electrical & Electronics Engineering
International Journal of Electrical and Computer Engineering (IJECE, ISSN: 2088-8708, a SCOPUS indexed Journal, SNIP: 1.001; SJR: 0.296; CiteScore: 0.99; SJR & CiteScore Q2 on both of the Electrical & Electronics Engineering, and Computer Science) is the official publication of the Institute of Advanced Engineering and Science (IAES). The journal is open to submission from scholars and experts in the wide areas of electrical, electronics, instrumentation, control, telecommunication and computer engineering from the global world.
Arjuna Subject : Ilmu Komputer (semua kategori) - Ilmu Komputer (Lain-Lain)
Articles 95 Documents
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Search results for , issue "Vol 11, No 2: April 2021" : 95 Documents clear
DEDA: An algorithm for early detection of topology attacks in the internet of things Jalindar Karande; Sarang Joshi
International Journal of Electrical and Computer Engineering (IJECE) Vol 11, No 2: April 2021
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/ijece.v11i2.pp1761-1770

Abstract

The internet of things (IoT) is used in domestic, industrial as well as mission-critical systems including homes, transports, power plants, industrial manufacturing and health-care applications. Security of data generated by such systems and IoT systems itself is very critical in such applications. Early detection of any attack targeting IoT system is necessary to minimize the damage. This paper reviews security attack detection methods for IoT Infrastructure presented in the state-of-the-art. One of the major entry points for attacks in IoT system is topology exploitation. This paper proposes a distributed algorithm for early detection of such attacks with the help of predictive descriptor tables. This paper also presents feature selection from topology control packet fields. The performance of the proposed algorithm is evaluated using an extensive simulation carried out in OMNeT++. Performance parameter includes accuracy and time required for detection. Simulation results presented in this paper show that the proposed algorithm is effective in detecting attacks ahead in time.
Image encryption based on elliptic curve cryptosystem Zahraa Kadhim Obaid; Najlae Falah Hameed Al Saffar
International Journal of Electrical and Computer Engineering (IJECE) Vol 11, No 2: April 2021
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/ijece.v11i2.pp1293-1302

Abstract

Image encryption based on elliptic curve cryptosystem and reducing its complexity is still being actively researched. Generating matrix for encryption algorithm secret key together with Hilbert matrix will be involved in this study. For a first case we will need not to compute the inverse matrix for the decryption processing cause the matrix that be generated in encryption step was self invertible matrix. While for the second case, computing the inverse matrix will be required. Peak signal to noise ratio (PSNR), and unified average changing intensity (UACI) will be used to assess which case is more efficiency to encryption the grayscale image.
Design and implementation of speech recognition system integrated with internet of things Ademola Abdulkareem; Tobiloba E. Somefun; Oji K. Chinedum; Felix Agbetuyi
International Journal of Electrical and Computer Engineering (IJECE) Vol 11, No 2: April 2021
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/ijece.v11i2.pp1796-1803

Abstract

The process of speech recognition is such that a speech signal from a client or user is received by the system through a microphone, then the system analyses this signal and extracts useful information from the signal which is converted to text. This study focuses on the design and implementation of a speech recognition system integrated with internet of thing (IoT) to control electrical appliances and door with raspberry pi as a core element. To design the speech recognition system, digital signal processing (DSP) technique and hidden Markov model were fully considered for processing, extraction and high predictive accuracy of the system. The Google application programming interface (API) was used as a cloud server to store command and give the system to assess to the internet. With 150 speech samples on the system, a high level of accuracy of over 80% was obtained.
High speed modified carry save adder using a structure of multiplexers Ahmed Salah Hameed; Marwa Jawad Kathem
International Journal of Electrical and Computer Engineering (IJECE) Vol 11, No 2: April 2021
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/ijece.v11i2.pp1591-1598

Abstract

Adders are the heart of data path circuits for any processor in digital computer and signal processing systems. Growth in technology keeps supporting efficient design of binary adders for high speed applications. In this paper, a fast and area-efficient modified carry save adder (CSA) is presented. A multiplexer based design of full adder is proposed to implement the structure of the CSA. The proposed design of full adder is employed in designing all stages of traditional CSA. By modifying the design of full adder in CSA, the complexity and area of the design can be reduced, resulting in reduced delay time. The VHDL implementations of CSA adders including (the proposed version, traditional CSA, and modified CSAs presented in literature) are simulated using Quartus II synthesis software tool with the altera FPGA EP2C5T144C6 device (Cyclone II). Simulation results of 64-bit adder designs demonstrate the average improvement of 17.75%, 1.60%, and 8.81% respectively for the worst case time, thermal power dissipation and number of FPGA logic elements.
Design of wide band slotted microstrip patch antenna with defective ground structure for ku band Akhila John Davuluri; P. Siddaiah
International Journal of Electrical and Computer Engineering (IJECE) Vol 11, No 2: April 2021
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/ijece.v11i2.pp1337-1345

Abstract

This paper proposes a microstrip patch antenna (MSPA) in the Ku band for satellite applications. The antenna is small in size with dimensions of about 40 mm×48 mm×1.59 mm and is fed with a coaxial cable of 50 Ω impedance. The proposed antenna has a wide bandwidth of 3.03 GHz ranging from 12.8 GHz to 15.8 GHz. To realize the characteristics of wideband the techniques of defective ground structure (DGS) and etching slots on the radiating element are adopted. The antenna is modeled on the FR4 substrate. A basic circular patch is selected for the design of a dual-frequency operation and in the next step DGS is introduced into the basic antenna and enhanced bandwidth is achieved at both the frequencies. To attain wider bandwidth two slots are etched on the radiating element of which one is a square ring slot and the second one is a circular ring slot. The novelty of the proposed antenna is a miniaturized design and unique response within the Ku band region which is applicable for wireless UWB applications with VSWR

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