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International Journal of Electrical and Computer Engineering

IJECE
Website

Published by Institute of Advanced Engineering and Science

ISSN : 20888708 EISSN : 27222578 DOI : -

Core Subject : Science, Engineering,

Computer Science & IT Electrical & Electronics Engineering

International Journal of Electrical and Computer Engineering (IJECE, ISSN: 2088-8708, a SCOPUS indexed Journal, SNIP: 1.001; SJR: 0.296; CiteScore: 0.99; SJR & CiteScore Q2 on both of the Electrical & Electronics Engineering, and Computer Science) is the official publication of the Institute of Advanced Engineering and Science (IAES). The journal is open to submission from scholars and experts in the wide areas of electrical, electronics, instrumentation, control, telecommunication and computer engineering from the global world.

Arjuna Subject : Ilmu Komputer (semua kategori) - Ilmu Komputer (Lain-Lain)

Articles 67 Documents

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Search results for , issue "Vol 7, No 4: August 2017" : 67 Documents clear

A Survey on Comparisons of Cryptographic Algorithms Using Certain Parameters in WSN Pooja Singh; R.K. Chauhan
International Journal of Electrical and Computer Engineering (IJECE) Vol 7, No 4: August 2017
Publisher : Institute of Advanced Engineering and Science

The Wireless Sensor Networks (WSNs) have spread its roots in almost every application. Owing to their scattered nature of sensor nodes, they are more prone to attacks. There are certain applications e.g. military, where sensor data’s confidentiality requirement during transmission is essential. Cryptography has a vital role for achieving security in WSNs.WSN has resource constraints like memory size, processing speed and energy consumption which bounds the applicability of existing cryptographic algorithms for WSN. Any good security algorithms has higher energy consumption by the nodes, so it’s a need to choose most energy-efficient cryptographic encryption algorithms for WSNs. This paper surveys different asymmetric algorithms such as RSA, Diffie-Hellman, DSA, ECC, hybrid and DNA cryptography. These algorithms are compared based on their key size, strength, weakness, attacks and possible countermeasures in the form of table.

Packaging Technique for Gain Improvement of Multi-resonance CPW-fed Antenna for Satellite Applications Jalal Naghar; Azzeddin Naghar; Otman Aghzout; Ana Vazquez Alejos; Francisco Falcone
International Journal of Electrical and Computer Engineering (IJECE) Vol 7, No 4: August 2017
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/ijece.v7i4.pp2094-2100

A suitable technique for gain improvement of multi-resonance CPW-fed antenna for satellite application at Ku-, K- and Ka-bands for user terminals is presented in this paper. New concept of stacking numerous layers with different dielectric material has been also presented. The conventional antenna design consists of a CPW-fed patch antenna with modified CPW elements printed on Rogers TMM4 substrate. In order to improve the antenna performance in term of gain and bandwidth, we propose two different configurations. The first one consists of designing a stacked structure by adding on the top of the single antenna an additional layer with parasitic elements. The dielectric added consists in Rogers RO3010 substrate with a high permittivity of 10.2. The proposed antenna is formed by two layers separated by an air gap; this new configuration provides major reduction on antenna beam width and allows gain enhancement. The second one implement the design of 2×1 and 4×1 series feed antenna arrays based on the conventional CPW-fed antenna. These array configurations are used to achieve higher gain in comparison with stacked solution. Finally we combined both techniques yielding the stacked 4×1 series feed antenna array. Fabricated CPW-fed antenna and the achieved results demonstrate the performance of presented techniques for gain improvements.

VHDL Design and FPGA Implementation of a High Data Rate Turbo Decoder based on Majority Logic Codes A. Boudaoud; M. El Haroussi; E. Abdelmounim
International Journal of Electrical and Computer Engineering (IJECE) Vol 7, No 4: August 2017
Publisher : Institute of Advanced Engineering and Science

This paper presents the electronic synthesis, VHDL design and implementation on FPGA of turbo decoders for Difference Set Codes (DSC) decoded by the majority logic (ML). The VHDL design is based on the decoding equations that we have simplified, in order to reduce the complexity and is implemented on parallel process to increase the data rate. A co-simulation using the Dsp-Builder tool on a platform designed on Matlab/Simulink, allows the measurement of the performance in terms of BER (Bit Error Rate) as well as the decoder validation. These decoders can be a good choice for future digital transmission chains. For example, for the Turbo decoder based on the product code DSC (21.11)² with a quantization of 5 bits and for one complete iteration, the results show the possibility of integration of our entire turbo decoder on a single chip, with lower latency at 0.23 microseconds and data rate greater than 500 Mb/s.

Economic Efficiency Measure of Induction Motors for Industrial Applications Keerti Rai; S B L Seksena; A N Thakur
International Journal of Electrical and Computer Engineering (IJECE) Vol 7, No 4: August 2017
Publisher : Institute of Advanced Engineering and Science

This paper, introduced an expression of Economic Efficiency Measure (EEM) to permit quick evaluation for replacement of faulty induction motor with alternative (new or refurbished motor) for lowest life-cycle cost based on efficiency and rated-load conditions. This approach, simplifies the process for evaluating the energy efficiency to mere proportionate factor called as EEM. During the operating phase, the motor losses correspond to extra energy consumption, based on various parameters like motor operating conditions, operating hours, operating costs, fault factor, depreciation factor and fixed costs. The approach is effective in addressing the global issue on replacement of the faulty motor that needs a comprehensive analysis and mathematical expression. Compared to other alternatives the EEM provides a simple but effective and reliable means to asses, the feasibility of replacing or refurbishing the faulty motor. A detail analysis here would establish how much the present approach is effective in determining the replacement for a faulty induction motor either by a new one or refurbished one of corresponding rating.

A Review on Web Application Testing and its Current Research Directions D. Rajya Lakshmi; S. Suguna Mallika
International Journal of Electrical and Computer Engineering (IJECE) Vol 7, No 4: August 2017
Publisher : Institute of Advanced Engineering and Science

Testing is an important part of every software development process on which companies devote considerable time and effort. The burgeoning web applications and their proliferating economic significance in the society made the area of web application testing an area of acute importance. The web applications generally tend to take faster and quicker release cycles making their testing very challenging. The main issues in testing are cost efficiency and bug detection efficiency. Coverage-based testing is the process of ensuring exercise of specific program elements. Coverage measurement helps determine the “thoroughness” of testing achieved. An avalanche of tools, techniques, frameworks came into existence to ascertain the quality of web applications. A comparative study of some of the prominent tools, techniques and models for web application testing is presented. This work highlights the current research directions of some of the web application testing techniques.

Asymptotic Stability of Quaternion-based Attitude Control System with Saturation Function Harry Septanto; Djoko Suprijanto
International Journal of Electrical and Computer Engineering (IJECE) Vol 7, No 4: August 2017
Publisher : Institute of Advanced Engineering and Science

In the design of attitude control, rotational motion of the spacecraft is usually considered as a rotation of rigid body. Rotation matrix parameterization using quaternion can represent globally attitude of a rigid body rotational motions. However, the representation is not unique hence implies difficulties on the stability guarantee. This paper presents asymptotically stable analysis of a continuous scheme of quaternion-based control system that has saturation function. Simulations run show that the designed system applicable for a zero initial angular velocity case and a non-zero initial angular velocity case due to utilization of deadzone function as an element of the defined constraint in the stability analysis.

FPGA Implementation of Higher Order FIR Filter Gurpadam Singh; Neelam R. Prakash
International Journal of Electrical and Computer Engineering (IJECE) Vol 7, No 4: August 2017
Publisher : Institute of Advanced Engineering and Science

The digital Finite-Impulse-Response (FIR) filters are mainly employed in digital signal processing applications. The main components of digital FIR filters designed on FPGAs are the register bank to save the samples of signals, adder to implement sum operations and multiplier for multiplication of filter coefficients to signal samples. Although, design and implementation of digital FIR filters seem simple but the design bottleneck is multiplier block for speed, power consumption and FPGA chip area occupation. The multipliers are an integral part in FIR structures and these use a large part of the chip area. This limits the number of processing elements (PE) available on the chip to realize a higher order of filter. A model is developed in the Matlab/Simulink environment to investigate the performance of the desired higher order FIR filter. An equivalent FIR filter representation is designed by the Xilinx FIR Compiler by using the exported FIR filter coefficients. The Xilinx implementation flow is completed with the help of Xilinx ISE 14.5. It is observed how the use of higher order FIR filter impacts the resource utilization of the FPGA and it’s the maximum operating frequency.

Energy Efficient Operation of Three Phase Induction Motor using Delstar Converter for Machine Tools M. Premkumar; R. Sowmya
International Journal of Electrical and Computer Engineering (IJECE) Vol 7, No 4: August 2017
Publisher : Institute of Advanced Engineering and Science

DELSTAR converter is an electronic system to be interfaced with the existing STAR – DELTA starter for machine tools. Induction motor consumes more power while it is operated at DELTA mode for a long time under no load condition. The proposed system gives the solution for the above stated problem. When the load on the motor is less than 40% of full load, it switches the motor to operate in STAR mode to save energy. When the load increases beyond 40%, it automatically switches the motor to operate in DELTA mode. The starting regimen is not disturbed. The proposed converter is recommended for applications where load changes are not more than 120 times/hour. This can be used with any capacity motor by choosing appropriate current transformers and setting the current level using the potentiometer built in. The proposed converter is designed for 5HP induction motor and experimentally tested.

Intelligent Hybrid Cloud Data Hosting Services with Effective Cost and High Availability Madhu Bala Myneni; L V Narasimha Prasad; D Naveen Kumar
International Journal of Electrical and Computer Engineering (IJECE) Vol 7, No 4: August 2017
Publisher : Institute of Advanced Engineering and Science

In this Paper the major concentration is an efficient and user based data hosting service for hybrid cloud. It provides friendly transaction scheme with the features of cost effective and high availability to all users. This framework intelligently puts data into cloud with effective cost and high availability. This gives a plan of proof of information respectability in which the client has utilize to check the rightness of his information. In this study the major cloud storage vendors in India are considered and the parameters like storage space, cost of storage, outgoing bandwidth and type of transition mode. Based on available knowledge on all parameters of existing cloud service providers in India, the intelligent hybrid cloud data hosting framework are assured to customers for low cost and high availability with mode of transition. It guarantees that the ability at the customer side is negligible and which will be helpful for customers.

Design of Compact Tri-Band Fractal Antenna for RFID Readers Mohamed Ihamji; Elhassane Abdelmounim; Hamid Bennis; Mostafa Hefnawi; Mohamed Latrach
International Journal of Electrical and Computer Engineering (IJECE) Vol 7, No 4: August 2017
Publisher : Institute of Advanced Engineering and Science

In this paper, a multiband and miniature rectangular microstrip antenna is designed and analyzed for Radio Frequency Identification (RFID) reader applications. The miniaturization is achieved using fractal technique and the physical parameters of the structure as well as its ground plane are optimized using CST Microwave Studio. The total area of the final structure is 71.6 x 94 mm2. The results show that the proposed antenna has good matching input impedance with a stable radiation pattern at 915 MHz, 2.45 GHz, and 5.8 GHz.

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Contact Name
Tole Sutikno

Contact Email
ijece@iaesjournal.com

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Journal Mail Official
ijece@iaesjournal.com

Editorial Address
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Location
Kota yogyakarta,

Daerah istimewa yogyakarta

INDONESIA

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Home Page

OAI Link

Editorial Team

Contact

Reviewer

Google Scholar

Contact Name Tole Sutikno

Contact Email ijece@iaesjournal.com

Phone -

Journal Mail Official ijece@iaesjournal.com

Editorial Address -

Location Kota yogyakarta, Daerah istimewa yogyakarta INDONESIA

Abstract

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Abstract

Contact Name
Tole Sutikno

Contact Email
ijece@iaesjournal.com

Phone
-

Journal Mail Official
ijece@iaesjournal.com

Editorial Address
-

Location
Kota yogyakarta,

Daerah istimewa yogyakarta

INDONESIA