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International Journal of Electrical and Computer Engineering
ISSN : 20888708     EISSN : 27222578     DOI : -
International Journal of Electrical and Computer Engineering (IJECE, ISSN: 2088-8708, a SCOPUS indexed Journal, SNIP: 1.001; SJR: 0.296; CiteScore: 0.99; SJR & CiteScore Q2 on both of the Electrical & Electronics Engineering, and Computer Science) is the official publication of the Institute of Advanced Engineering and Science (IAES). The journal is open to submission from scholars and experts in the wide areas of electrical, electronics, instrumentation, control, telecommunication and computer engineering from the global world.
Articles 67 Documents
Search results for , issue "Vol 8, No 1: February 2018" : 67 Documents clear
A Unified Approach for Performance Degradation Analysis from Transistor to Gate Level Izhar Hussain; Marco Vacca; Fabrizio Riente; Mariagrazia Graziano
International Journal of Electrical and Computer Engineering (IJECE) Vol 8, No 1: February 2018
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (3749.268 KB) | DOI: 10.11591/ijece.v8i1.pp412-420

Abstract

In this paper, we present an extensive analysis of the performance degradation in MOSFET based circuits. The physical effects that we consider are the random dopant fluctuation (RDF), the oxide thickness fluctuation (OTF) and the Hot-carrier-Instability (HCI). The work that we propose is based on two main key points: First, the performance degradation is studied considering BULK, Silicon-On-Insulator (SOI) and Double Gate (DG) MOSFET technologies. The analysis considers technology nodes from 45nm to 11nm. For the HCI effect we consider also the time-dependent evolution of the parameters of the circuit. Second, the analysis is performed from transistor level to gate level. Models are used to evaluate the variation of transistors key parameters, and how these variation affects performance at gate level as well.The work here presented was obtained using TAMTAMS Web, an open and publicly available framework for analysis of circuits based on transistors. The use of TAMTAMS Web greatly increases the value of this work, given that the analysis can be easily extended and improved in both complexity and depth.
Mathematical Modelling and Computer Simulation Assist in Designing Non-traditional Types of Precipitators and Separators Milan Bernat; Jaroslav Džmura; Renáta Bernátová; Ľubomr Žáčok; Jan Pavlovkin
International Journal of Electrical and Computer Engineering (IJECE) Vol 8, No 1: February 2018
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (692.966 KB) | DOI: 10.11591/ijece.v8i1.pp441-449

Abstract

The article deals with the application of the method for mathematical modeling and simulation at solving some issues in the area of electrostatic technology. It focuses on the processes in electrostatic separation and precipitation. Computer simulation is highly required for equipment design and for their diagnostics in critical operating states using theoretical calculations and experimental data evaluation. The presented computer models may be applied both by project and design engineers using the most advanced computer-aided design of electrostatic technologies.
Optimizing Apple Lossless Audio Codec Algorithm using NVIDIA CUDA Architecture Rafid Ahmed; Md. Sazzadul Islam; Jia Uddin
International Journal of Electrical and Computer Engineering (IJECE) Vol 8, No 1: February 2018
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (197.373 KB) | DOI: 10.11591/ijece.v8i1.pp70-75

Abstract

As majority of the compression algorithms are implementations for CPU architecture, the primary focus of our work was to exploit the opportunities of GPU parallelism in audio compression. This paper presents an implementation of Apple Lossless Audio Codec (ALAC) algorithm by using NVIDIA GPUs Compute Unified Device Architecture (CUDA) Framework. The core idea was to identify the areas where data parallelism could be applied and parallel programming model CUDA could be used to execute the identified parallel components on Single Instruction Multiple Thread (SIMT) model of CUDA. The dataset was retrieved from European Broadcasting Union, Sound Quality Assessment Material (SQAM). Faster execution of the algorithm led to execution time reduction when applied to audio coding for large audios. This paper also presents the reduction of power usage due to running the parallel components on GPU. Experimental results reveal that we achieve about 80-90% speedup through CUDA on the identified components over its CPU implementation while saving CPU power consumption.
Designing Framework for Standardization Case Study: Lithium-Ion Battery Module in Electric Vehicle Application Wahyudi Sutopo; Evizal Abdul Kadir
International Journal of Electrical and Computer Engineering (IJECE) Vol 8, No 1: February 2018
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (381.375 KB) | DOI: 10.11591/ijece.v8i1.pp220-226

Abstract

Standardization is one of the important things before to deploy a product. Regulation such as national standard has important roles in industry. The roles of standard such as ensuring safety for consumer and producer, increasing product competitiveness, and reducing trade berries. Indonesia is currently in the stage of developing industry of electric vehicle, so that standard which is related to electric vehicle, one of it is standard for the electric vehicle battery. Besides that, Indonesia does not have a relevant standard to regulate. This study is intended to make a framework for standardization of lithium-ion battery module product using A Framework for Analysis, Comparison, and Testing of Standard (FACTS) approach. There are three stages in FACTS approach, they are analysis, comparison, and testing. Based on the result of this research, the framework of lithium-ion battery module product standard consists of 8 parameters.
Schedulability of Rate Monotonic Algorithm using Improved Time Demand Analysis for Multiprocessor Environment Leena Das; Sourav Mohapatra; Durga Prasad Mohapatra
International Journal of Electrical and Computer Engineering (IJECE) Vol 8, No 1: February 2018
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (1436.834 KB) | DOI: 10.11591/ijece.v8i1.pp429-440

Abstract

Real-Time Monotonic algorithm (RMA) is a widely used static priority scheduling algorithm. For application of RMA at various systems, it is essential to determine the system’s feasibility first. The various existing algorithms perform the analysis by reducing the scheduling points in a given task set. In this paper we propose a schedubility test algorithm, which reduces the number of tasks to be analyzed instead of reducing the scheduling points of a given task. This significantly reduces the number of iterations taken to compute feasibility. This algorithm can be used along with the existing algorithms to effectively reduce the high complexities encountered in processing large task sets. We also extend our algorithm to multiprocessor environment and compare number of iterations with different number of processors. This paper then compares the proposed algorithm with existing algorithm. The expected results show that the proposed algorithm performs better than the existing algorithms.
Cryptanalysis on Privacy-Aware Two-factor Authentication Protocol for Wireless Sensor Networks Younsung Choi
International Journal of Electrical and Computer Engineering (IJECE) Vol 8, No 1: February 2018
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (560.376 KB) | DOI: 10.11591/ijece.v8i1.pp605-610

Abstract

Das first proposed two-factor authentication combining the smart card and password to resolve the security problems of wireless sensor networks (WSNs). After that, various researchers studied two-factor authentication suitable for WSNs. In user authentication protocols based on the symmetric key approach, a number of elliptic curve cryptography (ECC)-based authentication protocols have been proposed. To resolve the security and efficiency problems of ECC-based two-factor authentication protocols, Jiang et al. proposed a privacy-aware two-factor authentication protocol based on ECC for WSNs. However, this paper performs a vulnerability analysis on Jiang et al.’s authentication protocol and shows that it has security problems, such as a lack of mutual authentication, a risk of SID modification and DoS attacks, a lack of sensor anonymity, and weak ID anonymity.
A Coalition-Formation Game Model for Energy-Efficient Routing in Mobile Ad-hoc Network Abdelkabir Sahnoun; Ahmed Habbani; Jamal El Abbadi
International Journal of Electrical and Computer Engineering (IJECE) Vol 8, No 1: February 2018
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (456.484 KB) | DOI: 10.11591/ijece.v8i1.pp26-33

Abstract

One of the most routing problems in Mobile Ad-hoc Network is the node’s selfishness. Nodes are generally selfish and try to maximize their own benefit; hence these nodes refuse to forward packet on behalf of others to preserve their limited energy resources. This selfishness may lead to a low efficiency of routing. Therefore, it is important to study mechanisms which can be used encourage cooperation among nodes, to maintain the network efficiency. In this paper, we propose a cooperative game theoretic model to support more energy-aware and available bandwidth routing in MANET. We introduce a novel framework from coalitional-formation game theory, called hedonic coalition-formation game. We integrate this model to OLSR protocol that is an optimization over the classical link state protocol for the MANETs. Within each coalition, a coalition coordinator acts as a special MPR node to improve the energy efficient and the packet success rate of the transmission. Simulation results show how the proposed algorithm improve the performance in terms of the percentage of selected MPR nodes in the network, the percentage of alive nodes by time, and the Packet Delivery Ratio. Which prove that our proposed model leads, to better results compared to the classical OLSR.
Design, Realization and Measurements of Compact Dual-band CPW-fed Patch Antenna for 2.45/5.80 GHz RFID Applications Mohamed Tarbouch; Abdelkebir El Amri; Hanae Terchoune
International Journal of Electrical and Computer Engineering (IJECE) Vol 8, No 1: February 2018
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (637.818 KB) | DOI: 10.11591/ijece.v8i1.pp172-178

Abstract

In this paper, a Coplanar Wave Guide (CPW)-Fed microstrip octagonal patch antenna for RFID Applications is proposed. The studied structure is suitable for 2.45/5.80 GHz applications. The octagonal shape is obtained by making triangular cuts in the four angles of the rectangular microstrip patch antenna; in addition the using of CPW-Fed allows obtaining UWB characteristics in the higher band. The miniaturization in the antenna size for lower band is achieved by introducing an inverted E slot in the radiating element. The proposed antenna is designed on a single and a small substrate board of dimensions 29.5×29.5×1.6 mm3. Moreover the miniaturized antenna has a good impedance matching and an enhanced gain. The simulation analysis was performed using the CADFEKO software, a Method of Moment (MoM) based solver, and a prototype of this antenna was fabricated, good agreement with the simulation providing validation of the design procedure. The measurements are done with ANRITSU MS2026C Vectorial Network Analyzer.
Design and Implementation of Portable Outdoor Air Quality Measurement System using Arduino Teddy Surya Gunawan; Yasmin Mahira Saiful Munir; Mira Kartiwi; Hasmah Mansor
International Journal of Electrical and Computer Engineering (IJECE) Vol 8, No 1: February 2018
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (755.272 KB) | DOI: 10.11591/ijece.v8i1.pp280-290

Abstract

Recently, there is increasing public awareness of the real time air quality due to air pollution can cause severe effects to human health and environments. The Air Pollutant Index (API) in Malaysia is measured by Department of Environment (DOE) using stationary and expensive monitoring station called Continuous Air Quality Monitoring stations (CAQMs) that are only placed in areas that have high population densities and high industrial activities. Moreover, Malaysia did not include particulate matter with the size of less than 2.5μm (PM2.5) in the API measurement system. In this paper, we present a cost effective and portable air quality measurement system using Arduino Uno microcontroller and four low cost sensors. This device allows people to measure API in any place they want. It is capable to measure the concentration of carbon monoxide (CO), ground level ozone (O3) and particulate matters (PM10 & PM2.5) in the air and convert the readings to API value. This system has been tested by comparing the API measured from this device to the current API measured by DOE at several locations. Based on the results from the experiment, this air quality measurement system is proved to be reliable and efficient.
Analytical Model of Cage Induction Machine Dedicated to the Study of the Inner Race Bearing Fault Marouane Hadjami; Hubert Razik; Mohamed El Kamel Oumaamar; Abdelmamek Kezzar
International Journal of Electrical and Computer Engineering (IJECE) Vol 8, No 1: February 2018
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (738.226 KB) | DOI: 10.11591/ijece.v8i1.pp458-471

Abstract

This paper presents a new analytical model for inner bearing raceway defect. The model is based on the presentation of different machine inductances as Fourier series without any kind of reference frame transformation. The proposed approach shows that this model is able to give important features on the state of the motor. Simulation based on spectral analysis of stator current signal using Fast Fourier Transform (FFT) and experimental results are given to shed light on the usefulness of the proposed model.

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