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International Journal of Electrical and Computer Engineering
ISSN : 20888708     EISSN : 27222578     DOI : -
International Journal of Electrical and Computer Engineering (IJECE, ISSN: 2088-8708, a SCOPUS indexed Journal, SNIP: 1.001; SJR: 0.296; CiteScore: 0.99; SJR & CiteScore Q2 on both of the Electrical & Electronics Engineering, and Computer Science) is the official publication of the Institute of Advanced Engineering and Science (IAES). The journal is open to submission from scholars and experts in the wide areas of electrical, electronics, instrumentation, control, telecommunication and computer engineering from the global world.
Articles 69 Documents
Search results for , issue "Vol 8, No 2: April 2018" : 69 Documents clear
Qualitative Assessment on Effectiveness of Security Approaches towards Safeguarding NFC Devices & Services Anusha R; Veena Devi Shastrimat V
International Journal of Electrical and Computer Engineering (IJECE) Vol 8, No 2: April 2018
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (366.137 KB) | DOI: 10.11591/ijece.v8i2.pp1214-1221

Abstract

The increasing pace in the wireless communication taking momentum in the market of commercial application where a significant trade-off between user-experience and security demands exists. The Near Field Communication or NFC is one such communication trend which is effectively adopted by the user worldwide to make touchless operation using their mobile device. Although, it is claimed that NFC incorporates some of the standard encryption but existing researchers fails to prove that their electromagnetic signals are not so difficult to compromise to result in collateral damage to user's resources. Thus, there exist research work towards strengthing security system, but there is yet to report on any standard security protocol or framework to ensure the highest resiliency. This paper provides a comprehensive visualization towards the effectiveness of existing research approaches to formulate the research trend and gap.
Workflow Scheduling Techniques and Algorithms in IaaS Cloud: A Survey K. Kalyana Chakravarthi; Vaidhehi Vijayakumar
International Journal of Electrical and Computer Engineering (IJECE) Vol 8, No 2: April 2018
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (526.08 KB) | DOI: 10.11591/ijece.v8i2.pp853-866

Abstract

In the modern era, workflows are adopted as a powerful and attractive paradigm for expressing/solving a variety of applications like scientific, data intensive computing, and big data applications such as MapReduce and Hadoop. These complex applications are described using high-level representations in workflow methods. With the emerging model of cloud computing technology, scheduling in the cloud becomes the important research topic. Consequently, workflow scheduling problem has been studied extensively over the past few years, from homogeneous clusters, grids to the most recent paradigm, cloud computing. The challenges that need to be addressed lies in task-resource mapping, QoS requirements, resource provisioning, performance fluctuation, failure handling, resource scheduling, and data storage. This work focuses on the complete study of the resource provisioning and scheduling algorithms in cloud environment focusing on Infrastructure as a service (IaaS). We provided a comprehensive understanding of existing scheduling techniques and provided an insight into research challenges that will be a possible future direction to the researchers.
Algorithm for Fault Location and Classification on Parallel Transmission Line using Wavelet based on Clarke’s Transformation Makmur Saini; A. A. Mohd Zin; M. W. Mustafa; A. R. Sultan; Rusdi Nur
International Journal of Electrical and Computer Engineering (IJECE) Vol 8, No 2: April 2018
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (559.827 KB) | DOI: 10.11591/ijece.v8i2.pp699-710

Abstract

This paper proposed a new algorithm for fault location and classification using wavelet based on Clarke’s transformation to obtain the fault current. This novel method of fault current approach is studied by comparing the use of the glide path of the fault voltage. The current alpha and beta (Current Mode) were used to transform the signal using discrete wavelet transform (DWT). The fault location was determined by using the Clarke’s transformation, and then turned into a wavelet, which was very precise and thorough. The most accurate was the mother wavelet Db4 which had the fastest time and smallest error detection when compared with the other wavelet mothers. In this study, the Clarke’s transformation is also compared with the Karenbauer’s, which has produced results with similar error percentage. The simulation results using PSCAD / EMTDC software showed that the proposed algorithm could distinguish internal and external faults to get the current signal in the transformation of a signal fault.
Kalman Filter Algorithm for Mitigation of Power System Harmonics K. Dhineshkumar; C. Subramani
International Journal of Electrical and Computer Engineering (IJECE) Vol 8, No 2: April 2018
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (712.482 KB) | DOI: 10.11591/ijece.v8i2.pp771-779

Abstract

The maiden application of a variant of Kalman Filter (KF) algorithms known as Local Ensemble Transform Kalman Filter (LET-KF) are used for mitigation and estimation power system harmonics are proposed in this paper. The proposed algorithm is applied for estimating the harmonic parameters of power signal containing harmonics, sub-harmonics and inter-harmonics in presence of random noise. The KF group of algorithms are tested and applied for both stationary as well as dynamic signal containing harmonics. The proposed LET-KF algorithm is compared with conventional KF based algorithms like KF, Ensemble Kalman Filter (En-KF) algorithms for harmonic estimation with the random noise values 0.001, 0.05 and 0.1. Among these three noises, 0.01 random noise results will give better than other two noises. Because the phase deviation and amplitude deviation less in 0.01 random noise. The proposed algorithm gives the better results to improve the efficiency and accuracy in terms of simplicity and computational features. Hence there are less multiplicative operations, which reduce the rounding errors. It is also less expensive as it reduces the requirement of storing large matrices, such as the Kalman gain matrix used in other KF based methods.
A New Scheme of Group-based AKA for Machine Type Communication over LTE Networks Mariya Ouaissa; A. Rhattoy
International Journal of Electrical and Computer Engineering (IJECE) Vol 8, No 2: April 2018
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (787.492 KB) | DOI: 10.11591/ijece.v8i2.pp1169-1181

Abstract

Machine Type Communication (MTC) is considered as one of the most important approaches to the future of mobile communication has attracted more and more attention. To reach the safety of MTC, applications in networks must meet the low power consumption requirements of devices and mass transmission device. When a large number of MTC devices get connected to the network, each MTC device must implement an independent access authentication process according to the 3GPP standard, which will cause serious traffic congestion in the Long Term Evolution (LTE) network. In this article, we propose a new group access authentication scheme, by which a huge number of MTC devices can be simultaneously authenticated by the network and establish an independent session key with the network respectively. Experimental results show that the proposed scheme can achieve robust security and avoid signaling overload on LTE networks
Non-integer IMC based PID Design for Load Frequency Control of Power System Through Reduced Model Order Idamakanti Kasireddy; Abdul Wahid Nasir; Arun Kumar Singh
International Journal of Electrical and Computer Engineering (IJECE) Vol 8, No 2: April 2018
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (1766.625 KB) | DOI: 10.11591/ijece.v8i2.pp837-844

Abstract

This paper deals with non-integer internal model control (FIMC) based proportional-integral-derivative(PID) design for load frequency control (LFC) of single area non-reheated thermal power system under parameter divergence and random load disturbance. Firstly, a fractional second order plus dead time(SOPDT) reduced system model is obtained using genetic algorithm through step error minimization. Secondly, a FIMC based PID controller is designed for single area power system based on reduced system model. Proposed controller is equipped with single area non-reheated thermal power system. The resulting controller is tested using MATLAB/SIMULINK under various conditions. The simulation results show that the controller can accommodate system parameter uncertainty and load disturbance. Further, simulation shows that it maintains robust performance as well as minimizes the effect of load fluctuations on frequency deviation. Finally, the proposed method applied to two area power system to show the effectiveness.
Centeral Electric Field and Threshold Voltage in Accumulation Mode Junctionless Cylindrical Surrounding Gate MOSFET Hakkee Jung
International Journal of Electrical and Computer Engineering (IJECE) Vol 8, No 2: April 2018
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (782.702 KB) | DOI: 10.11591/ijece.v8i2.pp673-679

Abstract

Transfer characteristics is presented using analytical potential distribution of accumulation-mode junctionless cylindrical surrounding-gate (JLCSG) MOSFET, and deviation of center electric field at threshold voltage is analyzed for channel length and oxide thickness. Threshold voltages presented in this paper is good agreement with results of other compared papers, and transfer characteristics is agreed with those of two-dimensional simulation. The most important factor to determine threshold voltage is center electric field at source because the greater part of electron flows through center axis of JLCSG MOSFET. As a result of analysis for center electric field at threshold voltage, center electric field is decreased with reduction of channel length due to drain induced barrier lowering. Center electric field is increased with decrease of oxide thickness, and deviation of center electric field for channel length is significantly occurred with decrease of oxide thickness.
Model to Evaluate the Performance of Building Integrated Photovoltaic Systems using Matlab/Simulink Julian Andres Camacho Castro; Andres Julian Aristizabal Cardona
International Journal of Electrical and Computer Engineering (IJECE) Vol 8, No 2: April 2018
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (594.986 KB) | DOI: 10.11591/ijece.v8i2.pp680-688

Abstract

This article describes a mathematical model implemented in Matlab/Simulink to evaluate the performance of building integrated photovoltaic systems (BIPVS). The proposed methodology allows to model independently the solar panel, the photovoltaic (pv) generator, inverter and the grid to integrate them into a single model in Simulink in order to evaluate the performance of the complete system. The validation of the model was made on a BIPV system of 6 kWp installed in a building at the Universidad de Bogotá Jorge Tadeo Lozano in Bogota, Colombia. The results indicate that there is a correlation greater than 0.9 between DC and AC power generated by the BIPV system and calculated by the model proposed for any weather condition.
Routing Design Issues in Heterogeneous Wireless Sensor Network Manisha R. Dhage; Srikanth Vemuru
International Journal of Electrical and Computer Engineering (IJECE) Vol 8, No 2: April 2018
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (683.543 KB) | DOI: 10.11591/ijece.v8i2.pp1028-1039

Abstract

WSN has important applications such as habitat monitoring, structural health monitoring, target tracking in military and many more. This has evolved due to availability of sensors that are cheaper and intelligent but these are having battery support. So, one of the major issues in WSN is maximization of network life. Heterogeneous WSNs have the potential to improve network lifetime and also provide higher quality networking and system services than the homogeneous WSN. Routing is the main concern of energy consumption in WSN. Previous research shows that performance of the network can be improve significantly using protocol of hierarchical HWSN. However, the appropriateness of a particular routing protocol mainly depends on the capabilities of the nodes and on the application requirements. This study presents different aspects of Heterogeneous Wireless Sensor network and design issues for routing in heterogeneous environment. Different perspectives from different authors regarding energy efficiency based on resource heterogeneity for heterogeneous wireless sensor networks have been presented.
Low-Power D-Band CMOS Amplifier for Ultrahigh-Speed Wireless Communications Tuan Anh Vu; Kyoya Takano; Minoru Fujishima
International Journal of Electrical and Computer Engineering (IJECE) Vol 8, No 2: April 2018
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (2514.737 KB) | DOI: 10.11591/ijece.v8i2.pp933-938

Abstract

This paper presents a low-power D-Band amplifier suitable for ultrahigh-speed wireless communications. The three-stage fully differential amplifier with capacitive neutralization is fabricated in 40 nm CMOS provided by TSMC. Measurement results show that the D-band amplifier obtains a peak gain of 9.6 dB over a -3 dB bandwidth from 138 GHz to 164.5 GHz. It exhibits an output 1 dB compression point (OP1dB) of 1.5 dbm at the center frequency of 150 GHz. The amplifier consumes a low power of 27.3 mW from a 0.7 V supply voltage while its core occupies a chip area of 0.06 mm2.

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