International Journal of Power Electronics and Drive Systems (IJPEDS)
International Journal of Power Electronics and Drive Systems (IJPEDS, ISSN: 2088-8694, a SCOPUS indexed Journal) is the official publication of the Institute of Advanced Engineering and Science (IAES). The scope of the journal includes all issues in the field of Power Electronics and drive systems. Included are techniques for advanced power semiconductor devices, control in power electronics, low and high power converters (inverters, converters, controlled and uncontrolled rectifiers), Control algorithms and techniques applied to power electronics, electromagnetic and thermal performance of electronic power converters and inverters, power quality and utility applications, renewable energy, electric machines, modelling, simulation, analysis, design and implementations of the application of power circuit components (power semiconductors, inductors, high frequency transformers, capacitors), EMI/EMC considerations, power devices and components, sensors, integration and packaging, induction motor drives, synchronous motor drives, permanent magnet motor drives, switched reluctance motor and synchronous reluctance motor drives, ASDs (adjustable speed drives), multi-phase machines and converters, applications in motor drives, electric vehicles, wind energy systems, solar, battery chargers, UPS and hybrid systems and other applications.
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Investigation of common mode voltages of single stage boost inverter for five phase induction motor drive
Yaramasu Suri Babu;
Koritala Chandra Sekhar
International Journal of Power Electronics and Drive Systems (IJPEDS) Vol 13, No 3: September 2022
Publisher : Institute of Advanced Engineering and Science
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DOI: 10.11591/ijpeds.v13.i3.pp1352-1364
In this manuscript, the single stage boost inverter is proposed to eliminate the common-mode voltage (CMV) and electromagnetic interference (EMI) in the motor drives. The proposed topology has the capability of eliminating the effects of intrinsic CMV without any additional filters, active or passive elements, and modified pulse width modulated (PWM) techniques. This topology is proposed with the rearrangement of filter components from ac side to mid place in such a way that the capacitor constantly clamped to the DC bus, and the inductor is placed at the mid-point of half-bridge module and supply to achieve the high gain. This arrangement is also eliminating the effect of switching natured common-mode voltage, which generally occurs in any conventional PWM inverter. Conventional PWM techniques can be implemented to this topology without any modification in the control strategy. The proposed topology is simulated in a MATLAB Simulink to verify the operation and CM reduction capabilities with the results of experimental prototype. In the manuscript, the proposed topology is compared with the traditional inverters and modulation schemes in terms of the CMV effect elimination to explain its effectiveness.