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International Journal of Reconfigurable and Embedded Systems (IJRES)
Published by Institute of Advanced Engineering and Science
ISSN : 20894864     EISSN : 27222608     DOI : -
Core Subject : Economy,
Economics, Econometrics & Finance
The centre of gravity of the computer industry is now moving from personal computing into embedded computing with the advent of VLSI system level integration and reconfigurable core in system-on-chip (SoC). Reconfigurable and Embedded systems are increasingly becoming a key technological component of all kinds of complex technical systems, ranging from audio-video-equipment, telephones, vehicles, toys, aircraft, medical diagnostics, pacemakers, climate control systems, manufacturing systems, intelligent power systems, security systems, to weapons etc. The aim of IJRES is to provide a vehicle for academics, industrial professionals, educators and policy makers working in the field to contribute and disseminate innovative and important new work on reconfigurable and embedded systems. The scope of the IJRES addresses the state of the art of all aspects of reconfigurable and embedded computing systems with emphasis on algorithms, circuits, systems, models, compilers, architectures, tools, design methodologies, test and applications.
Arjuna Subject : -
Articles 27 Documents
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Search results for , issue "Vol 14, No 2: July 2025" : 27 Documents clear
Design and evaluation of clock-gating-based approximate multiplier for error-tolerant applications Venkata Sudhakar, Chowdam; Potladurty, Suresh Babu; Karipireddy, Prasad Reddy
International Journal of Reconfigurable and Embedded Systems (IJRES) Vol 14, No 2: July 2025
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/ijres.v14.i2.pp398-411

Abstract

The multiplier is an essential component in real-time applications. Even though approximation arithmetic affects output accuracy in multipliers, it offers a realistic avenue to constructing power area and speed-efficient digital circuits. The approximation computing technique is commonly used in error-tolerant applications such as signal, image, and video processing. In this paper, approximate multipliers (AMs) are designed using both conventional and approximate half adders (A-HA) and full adders (A-FA), which are strategically placed to add partial products at the most significant bit (MSB) positions, and OR gates are used to add partial products at the lower significant bit (LSB). In addition, this research article demonstrates unsigned and signed multipliers using the ripple carry adder (RCA), carry save adder (CSA), conditional sum adder (COSA), carry select adder (CSLA), and clock gating technique. The proposed multipliers are implemented in Verilog hardware description language (HDL) and simulated on the Xilinx VIVADO 2021.2 design tool with target platform Artix-7 AC701 FPGA. The simulation results found that unsigned and signed approximate multiplier power consumption was reduced by 13% and 18.18% respectively and enhanced accuracy.
Design and development of multiband multi-mode frequency reconfigurable CPW-fed antenna for 5G wireless communication Tiwari, Annu; Yilmaz, Muhammed Yasir; Soni, Gaurav Kumar; Yadav, Dinesh
International Journal of Reconfigurable and Embedded Systems (IJRES) Vol 14, No 2: July 2025
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/ijres.v14.i2.pp328-338

Abstract

This research develops, simulates, fabricates and measured a coplanar waveguide (CPW)-fed multiband multi-mode frequency reconfigurable antenna for 5G wireless communication. The antenna is design on Rogers RT5880 substrate with a dielectric constant of 2.2, a thickness of 0.508 mm, and a loss tangent (tanδ) of 0.0009 and the dimension is 30×28×0.508 mm3. The presented antenna has shown good impedance matching with reflection coefficients ranging from -14.82 to -50.36 dB at different frequencies between 6 GHz to 24 GHz. The presented frequency reconfigurable antenna design includes four PIN diodes, resistors, and inductors, enabling 16 different configurations. The simulated outcomes showed varied S parameter values and gains, demonstrating the antenna's flexibility. Measurements were taken using vector network analyzer (VNA) and anechoic chamber to assess reflection coefficient (|S11|) and gain, confirming the antenna's performance. The antenna's ability to reconfigure dynamically without losing signal integrity makes it suitable for 5G wireless applications. It meets and exceeds the requirements for multiband operation, validated by comprehensive simulations and measurements, showing its potential for wide use.
Classifying IoT firmware security threats using image analysis and deep learning Rouagubi, Abdelkabir; El Youssofi, Chaymae; Chougdali, Khalid
International Journal of Reconfigurable and Embedded Systems (IJRES) Vol 14, No 2: July 2025
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/ijres.v14.i2.pp546-557

Abstract

As the internet of things (IoT) grows, its embedded devices face increasing vulnerability to firmware-based attacks. The lack of robust security mechanisms in IoT devices makes them susceptible to malicious firmware updates, potentially compromising entire networks. This study addresses the classification of IoT firmware security threats using deep learning and image-based analysis techniques. A publicly available dataset of 32×32 grayscale images, derived from IoT firmware samples and categorized as benignware, hackware, and malware, was utilized. The grayscale images were converted into three-channel RGB format to ensure compatibility with convolutional neural networks (CNNs). We tested multiple pre-trained CNN architectures, including SqueezeNet, ShuffleNet, MobileNet, Xception, and ResNet50, employing transfer learning to adapt the models for this classification task. Both ResNet50 and ShuffleNet achieved exceptional performance, with 100% accuracy, precision, recall, and F1-score. These results validate the effectiveness of our methodology in leveraging transfer learning for IoT firmware classification while maintaining computational efficiency, making it suitable for deployment in resource-constrained IoT environments. T
Test and measurement automation of printed circuit board assembly using digital oscilloscope Kumar, Sanjeev; Prasad, Deepak; Pandey, Manoj
International Journal of Reconfigurable and Embedded Systems (IJRES) Vol 14, No 2: July 2025
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/ijres.v14.i2.pp463-471

Abstract

The testing and measurement (TM) of electrical parameters of printed circuit board assembly (PCBA) plays an integral part in the manufacturing sectors. These industries work on embedded system which widely use digital oscilloscopes (DO) for such purposes, however, operate them manually. An exponential rise in the implementation of industry 4.0 with the increasing demand for industrial products makes manual TM cumbersome. The automation of oscilloscopes (AO) remains a viable alternative to these issues requiring further investigation. An accurate and automated TM block facilitates efficient design, development, and assembly of a fully functional system hence addressed here. The AO has been carried out using generalized software that can be configured based on industry requirements. It subsequently stores the data on the server for better traceability. The automated software is developed using VB.NET and installed on a personal computer. Experiments reveal the proposed approach saves approximately 60%-70% of the time required for each PCBA operation than that of the manual system. This can enhance the productivity of the industry in terms of manpower and Resource utilization with a reduction in operating costs.
Systematic review of a lightweight convolutional neural network architectures on edge devices Abu Talib, Muhammad Abbas; Setumin, Samsul; Abu Bakar, Siti Juliana; Che Ani, Adi Izhar; Cahyani, Denis Eka
International Journal of Reconfigurable and Embedded Systems (IJRES) Vol 14, No 2: July 2025
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/ijres.v14.i2.pp339-352

Abstract

A lightweight convolutional neural network (CNN) has become one of the major studies in machine learning field to optimize its potential for employing it on the resource-constrained devices. However, a benchmark for fair comparison is still missing and thus, this paper aims to identify the recent studies regarding the lightweight CNN architectures including the types of CNN, its applications, edge devices usage, evaluation types and matrices, and performance comparison. The preferred reporting items for systematic reviews and meta-analysis (PRISMA) framework was used as the main approach to collect and interpret the literature. In the process, 37 papers were identified as meeting the criteria for lightweight CNNs aimed at image classification or regression tasks. Of these, only 20 studies explored the use of these models on edge devices. To conclude, MobileNet appeared as the most used architecture, while the types of CNN focused on image classification for the general-purpose application. Following that, the NVIDIA Jetson Nano was the most utilized edge device in recent research. Additionally, performance evaluation commonly included measures like accuracy and time, along with metrics such as recall, precision, F1-Score, and other similar indicators. Finally, the average accuracy for performance comparison can serve as threshold value for future research in this scope of study.
On time audio alert automated intelligent system for visually impaired people Pretty Diana Cyril, Cyriloose; Vethanayagam, Sumathy; Geetha, Sundararajan; Krishna, Brahmadesam Viswanathan
International Journal of Reconfigurable and Embedded Systems (IJRES) Vol 14, No 2: July 2025
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/ijres.v14.i2.pp428-439

Abstract

India is the home of the world’s blind population. The country has around 12 million individuals with visual impairment against a global total of 39 million according to a report published by the National Programme for Control of Blindness. Visually impaired people cannot live independently. They have to depend on others for their daily activities. The major problem occurs when blind people walk on the road, they cannot detect any obstacle which puts them at risk. sometimes it causes major injuries and accidents. With the proposed system, visually impaired people can walk on the road independently. A device with internet of things (IoT) technology where smart glass is embedded with an ultrasonic sensor, sunglasses, Raspberry Pi, voice module ISD1820, and Bluetooth. This device alerts the user with audio guidance. When people walk in front of an obstacle, the device detects the obstacle and tells the user at what distance the obstacle is there. They can walk on the road comfortably and fearlessly. It gives audio alerts about obstacles to the user. The key features are it is easy to wear, lightweight, and cost-effective. Wearing smart glasses, they can walk on the road confidently like a normal human being without any guilt.
Real-time face detection and local binary patterns histograms-based face recognition on Raspberry Pi with OpenCV Chandrasekaran, Bharanidharan; Karunkuzhali, D.; Kandasamy, V.; DIllibabu, M.; Rama Devi, K.
International Journal of Reconfigurable and Embedded Systems (IJRES) Vol 14, No 2: July 2025
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/ijres.v14.i2.pp527-537

Abstract

This paper presents a practical end-to-end paper demonstrating real-time face recognition using a Raspberry Pi and open source computer vision library (OpenCV) consisting of three main stages: training the recognizer, real-time recognition, and face detection and data gathering. The paper offers a comprehensive guide for enthusiasts venturing into computer vision and facial recognition. Employing the Haar Cascade classifier for accurate face detection and the local binary patterns histograms (LBPH) face recognizer for robust training and recognition, the paper ensures a thorough understanding of key concepts. The step-by-step process covers software installation, camera testing, face detection, data collection, training, and real time recognition. With a focus on the Raspberry Pi platform, this paper serves as an accessible entry point for exploring facial recognition technology. Readers will gain insights into practical implementation, making it an ideal resource for learners and hobbyists interested in delving into the exciting realm of computer vision.

Page 3 of 3 | Total Record : 27

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