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All Journal Bulletin of Electrical Engineering and Informatics
Khuralay Moldamurat
L.N. Gumilyov Eurasian National University
Electrical & Electronics Engineering

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Optimizing the implementation of the Saber post-quantum cryptography scheme with a hybrid architecture Sabyrzhan Atanov; Khuralay Moldamurat; Luigi La Spada; Makhabbat Bakyt; Adil Maidanov
Bulletin of Electrical Engineering and Informatics Vol 15, No 1: February 2026
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/eei.v15i1.10103

Abstract

This paper presents a hardware–software hybrid implementation of the Saber key encapsulation mechanism (KEM) on a Terasic DE10-Nano board, which combines an ARM Cortex-A9 processor and an Intel Cyclone V field programmable gate array (FPGA). By offloading computationally intensive polynomial multiplication to a dedicated FPGA module, the hybrid design significantly reduces execution time. Experimental results show that compared to a software-only approach, the hybrid design decreases execution time by 40% for key generation, 35% for encapsulation, and 50% for decapsulation. The consistent performance gains were confirmed across the LightSaber, Saber, and FireSaber parameter sets, demonstrating that CPU-FPGA co-design offers significant efficiency improvements for post quantum cryptography (PQC), especially on platforms with limited resources.
Co-Authors Adil Maidanov Luigi La Spada Makhabbat Bakyt Sabyrzhan Atanov