Article Per Year (5 Year)
p-Index From 2021 - 2026
0
P-Index
This Author published in this journals
All Journal International Journal of Electrical and Computer Engineering International Journal of Power Electronics and Drive Systems (IJPEDS) Indonesian Journal of Electrical Engineering and Computer Science
V. Kalyanasundaram
SRM Institute of Science and Technology
Computer Science & IT Control & Systems Engineering Electrical & Electronics Engineering

Published : 5 Documents Claim Missing Document
Claim Missing Document
Check
Articles

Found 5 Documents
Search

 1 
Transformer based NPC multilevel inverter using reduced number of components R. Palanisamy; K. Selvakumar; K. Vijayakumar; D. Karthikeyan; S. Vidyasagar; V. Kalyanasundaram
International Journal of Electrical and Computer Engineering (IJECE) Vol 9, No 6: December 2019
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (14.56 KB) | DOI: 10.11591/ijece.v9i6.pp5150-5158

Abstract

This paper revolves around the reduction of a number of switches and the sources for a multilevel inverter, for this, we have proposed a transformer-based topology which has helped us in reducing the number of switches from twenty-four to sixteen and also in the reduction of sources from eight to one. The circuit consists of two H-Bridges which are coupled by a single-phase transformer, the topology gives us a liberty of changing the number of levels in accordance to the number of turns in the secondary side of the transformer for example if our ratio is 1:1 the number of levels will be five subsequently if it is changed to 1:2 the number of levels will be changed to seven. As the number of switches is reduced the size and complexity of the circuit is also decreased. In order to improve on the part of switching efficiency, we have used space vector pulse width modulation which is a better method as compared to its counterpart switching methods such as sinusoidal pulse width modulation and multiple pulse width modulation techniques.
A new multilevel DC-AC converter topology with reduced switch using multicarrier sinusoidal pulse width modulation R. Palanisamy; S. Vidyasagar; V. Kalyanasundaram; D. Karthikeyan; K. Selvakumar; D. Selvabharathi; K. Vijayakumar
International Journal of Power Electronics and Drive Systems (IJPEDS) Vol 11, No 2: June 2020
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (622.582 KB) | DOI: 10.11591/ijpeds.v11.i2.pp752-761

Abstract

Multilevel converters have a significant role in power processing control in the power system, which has some inherent features like reduced harmonics, high power & medium voltage, reduced voltage stress. In this proposed paper, a novel multilevel inverter with reduced number of switches and without passive components. The proposed inverter generates 15 level output voltage with suitable switching pulse generation using multicarrier sinusoidal pulse width modulation (MSPWM) and different level of voltages are obtained with variation of modulation index. Also coupled inductor is used to minimize the harmonic content and smoothing output current. The scheme which includes different range of unequal voltage sources. As a result, the proposed system it reduces switching control complexity and there is no voltage balancing problem. This paper elucidates the operating modes, voltage stress minimisation and harmonic reduction are discussed. The results of the proposed multilevel dc-ac converter are verified using matlab/simulink. The simulation & hardware results of the proposed inverter were verified using matlab simulink and dsPIC controller respectively, which was analysed with different voltage level and different modulation index.
Reduction of transients in switches using embedded machine learning P. Suresh; S. George Fernandez; S. Vidyasagar; V. Kalyanasundaram; K. Vijayakumar; Vaidheeswaran Archana; Soham Chatterjee
International Journal of Power Electronics and Drive Systems (IJPEDS) Vol 11, No 1: March 2020
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (334.407 KB) | DOI: 10.11591/ijpeds.v11.i1.pp235-241

Abstract

Non-linear loads can cause transients in electronic switches. They also result in a fluctuating output when the device is switched ON or OFF. These transients can harm not only the switches but also the devices that they are connected to, by passing excess currents or voltages to the devices. By applying machine learning, we can improve the gate drive voltages of the switches and thereby reduce switch transients. A feedback system is built that measures the output transients and then feeds it to a neural network algorithm that then gives a proper gate drive to the device. This will reduce transients and also improve performances of switch based devices like inverters and converters.
Simulation of Zeta Converter Based 3-level NPC Inverter with PV System D. Selvabharathi; Palanisamy R; K. Selvakumar; V. Kalyanasundaram; D. Karthikeyan; Amal Nair; Kriti Karnavat; Annanya Sharma
Indonesian Journal of Electrical Engineering and Computer Science Vol 12, No 1: October 2018
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/ijeecs.v12.i1.pp1-6

Abstract

This paper proposes increasing the efficiency of the autonomous Photovoltaic (PV) system by utilizing zeta converter alongside neutral point clamped multilevel inverters (NPC-MLI) based on innovative PWM scheme. The PV system acts as an input source and the relevant control of zeta converter through maximum power point tracking (MPPT) offers the maximum available power from the PV array connected to DC-link. To obtain a high voltage gain we need to exhaust the dc-link voltage as much as possible and reduce stress on the switches. For this the NPC-MLI algorithm approaches PWM technique to perform capacitive charging in parallel and discharging in series to obtain maximum voltage gain. The proposed scheme is designed and verified via detailed simulations in the MATLAB/Simulink environment. 
A two stage battery charger for EV charging applications V. Kalyanasundaram; George S Fernandez; K. Vijayakumar; S. Vidyasagar
Indonesian Journal of Electrical Engineering and Computer Science Vol 19, No 2: August 2020
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/ijeecs.v19.i2.pp593-599

Abstract

Electric power generation and consumption are indicating an unprecedented change in recent decades. Electrical power industry and transportation sector lie at the core of this development and hence this change. This change is one of the major causes of polluting environmental and global warming. So, to decrease the dependency on conventional fuels and greenhouse gas emissions, countries around the globe are actively finding alternative energy resources. It will help to develop clean and green energies to build a sustainable society. Simultaneously, energy utilization in the field of transportation is witnessing a change from fossil fuel to electricity-based fuel. Electrified transportation system is a solution to endorse sustainable energy development and addressing environmental pollution, global warming issues. In this paper, an EV battery charger is designed with a two-stage charging model to achieve good efficiency. The design is simulated by using MATLAB simulation and compared with the existing model. The simulation results show that the proposed model is superior to the traditional model.
Co-Authors Amal Nair Annanya Sharma D. Karthikeyan D. Selvabharathi George S Fernandez K. Selvakumar K. Vijayakumar Kriti Karnavat P. Suresh Palanisamy R R. Palanisamy S. George Fernandez S. Vidyasagar Soham Chatterjee Vaidheeswaran Archana