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Wan Haszerila Wan Hassan
Universiti Teknikal Malaysia Melaka
Computer Science & IT Electrical & Electronics Engineering

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Flood disaster indicator of water level monitoring system Wan Haszerila Wan Hassan; Aiman Zakwan Jidin; Siti Asma Che Aziz; Norain Rahim
International Journal of Electrical and Computer Engineering (IJECE) Vol 9, No 3: June 2019
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (443.374 KB) | DOI: 10.11591/ijece.v9i3.pp1694-1699

Abstract

The early warning systems for flood management have been developed rapidly with the growth of technologies. These system help to alert people early with the used of Short Message Service (SMS) via Global System for Mobile Communications (GSM). This paper presents a simple, portable and low cost of early warning system using Arduino board, which is used to control the whole system and GSM shields to send the data. System has been designed and implemented based on two components which is hardware and software. The model determines the water level using float switch sensors, then it analyzes the collected data and determine the type of danger present. The detected level is translated into an alert message and sent to the user. The GSM network is used to connect the overall system units via SMS.
Improve performance of the digital sinusoidal generator in FPGA by memory usage optimization Aiman Zakwan Jidin; Irna Nadira Mahzan; A. Shamsul Rahimi A. Subki; Wan Haszerila Wan Hassan
International Journal of Electrical and Computer Engineering (IJECE) Vol 9, No 3: June 2019
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (467.12 KB) | DOI: 10.11591/ijece.v9i3.pp1742-1749

Abstract

This paper presented the improvement in the performance of the digital sinusoidal signal generator, which was implemented in FPGA, by optimizing the usage of the available memory onboard. The sine wave was generated by using a Lookup Table method, where its pre-calculated values were stored in the onboard memory, and its frequency can be adjustable by changing the incremental step value of the memory address. In this proposed research, the memory stores only 25000 samples of the first quarter from a period of a sine wave and thus, the output signal accuracy was increased and the output frequency range was expanded, compared to the previous research. The proposed design was successfully developed and implemented in ALTERA Cyclone III DE0 FPGA Development Board, and its functionality was validated via functional simulation in Modelsim and also hardware experimental results observation in SignalTap II.
Co-Authors A. Shamsul Rahimi A. Subki Aiman Zakwan Jidin Irna Nadira Mahzan Norain Rahim Siti Asma Che Aziz