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All Journal International Journal of Electrical and Computer Engineering
Wan Mohd Hashimi Wan Mohamad Sharif
Universiti Teknologi MARA
Computer Science & IT Electrical & Electronics Engineering

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Hybrid memristor-CMOS implementation of logic gates design using LTSpice Wan Mohd Hashimi Wan Mohamad Sharif; Mohd Faizul Md Idros; Syed Abdul Mutalib Al-Junid; Fairul Nazmi Osman; Abdul Hadi Abdul Razak; Abdul Karimi Halim; Muhammad Adib Harun
International Journal of Electrical and Computer Engineering (IJECE) Vol 11, No 3: June 2021
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/ijece.v11i3.pp2003-2010

Abstract

In this paper, a hybrid memristor-CMOS implementation of logic gates simulated using LTSpice. Memristors' implementation in computer architecture designs explored in various design structures proposed by researchers from all around the world. However, all prior designs have some drawbacks in terms of applicability, scalability, and performance. In this research, logic gates design based on the hybrid memristor-CMOS structure presented. 2-inputs AND, OR, NAND, NOR, XOR, and XNOR are demonstrated with minimum components requirements. In addition, a 1-bit full adder circuit with high performance and low area consumption is also proposed. The proposed full adder only consists of 4 memristors and 7 CMOS transistors. Half design of the adder base on the memristor component created. Through analysis and simulations, the memristor implementation on designing logic gates using memristor-CMOS structure demonstrated using the generalized metastable switch memristor (MSS) model and LTSpice. In conclusion, the proposed approach improves speed and require less area.
Co-Authors Abdul Hadi Abdul Razak Abdul Karimi Halim Fairul Nazmi Osman Mohd Faizul Md Idros Muhammad Adib Harun Syed Abdul Mutalib Al-Junid