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All Journal International Journal of Electrical and Computer Engineering TELKOMNIKA (Telecommunication Computing Electronics and Control)
Adang Suwandi Ahmad
Institut Teknologi Bandung
Computer Science & IT Electrical & Electronics Engineering

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Revealing AES Encryption Device Key on 328P Microcontrollers with Differential Power Analysis Septafiansyah Dwi Putra; Adang Suwandi Ahmad; Sarwono Sutikno; Yusuf Kurniawan; Arwin Datumaya Wahyudi Sumari
International Journal of Electrical and Computer Engineering (IJECE) Vol 8, No 6: December 2018
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (838.471 KB) | DOI: 10.11591/ijece.v8i6.pp5144-5152

Abstract

This research demonstrates the revealing of an advanced encryption standard (AES) encryption device key. The encryption device is applied to an ATMEGA328P microcontroller. The said microcontroller is a device commonly used in internet of things (IoT). We measured power consumption when the encryption process is taking place. The message sent to the encryption device is randomly generated, but the key used has a fixed value. The novelty of this research is the creation of a systematic and optimal circuit in carrying the differential power analysis or difference of means (DPA/DoM) technique, so the technique can be applied in key revealing on a microcontroller device by using 500 traces in 120 seconds.
Towards cognitive artificial intelligence device: an intelligent processor based on human thinking emulation Catherine Olivia Sereati; Arwin Datumaya Wahyudi Sumari; Trio Adiono; Adang Suwandi Ahmad
TELKOMNIKA (Telecommunication Computing Electronics and Control) Vol 18, No 3: June 2020
Publisher : Universitas Ahmad Dahlan

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.12928/telkomnika.v18i3.14835

Abstract

The intervention of computer technology began the era of a more intelligent and independent instrumentation system based on intelligent methods such as artificial neural networks, fuzzy logic, and genetic algorithm. On the other hand, processor with artificial cognitive ability has also been discovered in 2016. The architecture of the processor was designed based on knowledge growing system (KGS) algorithm, a new concept in artificial intelligence (AI) which is focused on the emulation of the process of the growing of knowledge in human brain after getting new information from human sensory organs. KGS is considered as the main method of a new perspective in AI called as cognitive artificial intelligence (CAI). The design is to obtain the architecture of the data path of the processor. We found that the complexity of the processor circuit is determined by the number of combinations of sensors and hypotheses as the main inputs to the processor. This paper addresses the development of an intelligence processor based on cognitive AI in order to realize an Intelligence Instrumentation System. The processor is implemented in field programmable gate array (FPGA) and able to perform human thinking emulation by using KGS algorithm.
Power analysis attack against encryption devices: a comprehensive analysis of AES, DES, and BC3 Septafiansyah Dwi Putra; Mario Yudhiprawira; Sarwono Sutikno; Yusuf Kurniawan; Adang Suwandi Ahmad
TELKOMNIKA (Telecommunication Computing Electronics and Control) Vol 17, No 3: June 2019
Publisher : Universitas Ahmad Dahlan

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.12928/telkomnika.v17i3.9384

Abstract

Cryptography is a science of creating a secret message and it is constantly developed. The development consists of attacking and defending the cryptography itself. Power analysis is one of many Side-Channel Analysis (SCA) attack techniques. Power analysis is an attacking technique that uses the information of a cryptographic hardware’s power consumption. Power analysis is carried on by utilizing side-channel information to a vulnerability in a cryptographic algorithm. Power analysis also uses a mathematical model to recover the secret key of the cryptographic device. This research uses design research methodology as a research framework started from research clarification to descriptive study. In this research, power analysis attack is implemented to three symmetrical cryptographic algorithms: DES (Data Encryption Standard), AES (Advanced Encryption Standard), and BC3 (Block Cipher 3). The attack has successfully recovered 100% of AES secret key by using 500 traces and 75% DES secret key by using 320 traces. The research concludes that the power analysis attack using Pearson Correlation Coefficient (PCC) method produces more optimal result compared to a difference of means method.
Architecture design for a multi-sensor information fusion processor Catherine Olivia Sereati; Arwin Datumaya Wahyudi Sumari; Trio Adiono; Adang Suwandi Ahmad
TELKOMNIKA (Telecommunication Computing Electronics and Control) Vol 17, No 1: February 2019
Publisher : Universitas Ahmad Dahlan

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.12928/telkomnika.v17i1.10180

Abstract

This paper discusses the design of the architecture of an information fusion processor. This processor emulates the way of human thinking, namely by drawing conclusions from the obtained collection of information. Architecture design for this processor is based on Knowledge Growing System (KGS) algorithm. KGS is a novelty in Artificial Intelligence field. Compared to other AI methods, KGS focuses on the observation of the process of the knowledge growth within human brain based on information received from the surrounding environment. By using KGS algorithm, this processor works by receiving inputs from a set of sensors and possible hypotheses obtained after the processing of the information. The processor generates a value which is called as Degree of Certainty (DoC), which show the most possible hypothesis among all alternative ones. The Processor Elements which are used to perform KGS algorithm is designed based on systolic array architecture. The design of this processor is realized with VHSIC Hardware Design Language (VHDL) and synthesized by using FPGA Quartus II.13.1. The results show that the data path which has been design is able to perform the mechanism of KGS computation.
Co-Authors Arwin Datumaya Wahyudi Sumari Catherine Olivia Sereati Mario Yudhiprawira Sarwono Sutikno Septafiansyah Dwi Putra Trio Adiono Yusuf Kurniawan