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IMPLEMENTASI ASSET MANAGEMENT DENGAN SNIPE-IT DI PUSAT MIKROELEKTRONIKA INSTITUT TEKNOLOGI BANDUNG Agung, Anton Toni; Fuada, Syifaul; Adiono, Trio
Simetris: Jurnal Teknik Mesin, Elektro dan Ilmu Komputer Vol 10, No 1 (2019): JURNAL SIMETRIS VOLUME 10 NO 1 TAHUN 2019
Publisher : Universitas Muria Kudus

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (1444.326 KB) | DOI: 10.24176/simet.v10i1.2961

Abstract

Berdasarkan temuan dilapangan, Pusat Mikroelektronika Institut Teknologi Bandung (PME ITB) memiliki banyak kelemahan dalam melakukan pencatatan aset karena masih dilakukan secara manual yang mengakibatkan potensi kehilangan aset akan sangat mudah terjadi. Selain itu, pengelola aset di lingkungan PUI PT Mikroelektronika ITB sangat kesulitan dalam menyiapkan dokumentasi aset pada saat kegiatan monitoring dan evaluasi (MoNev) dengan investigator dari Departemen Logistik ITB (6 bulan sekali) dan KEMRISTEKDIKTI (setahun sekali). Dibutukan sebuah sistem berbasis web untuk membantu proses investarisasi. Penelitian ini memanfaatkan open source software, yaitu Snipe-IT sebagai sistem inventaris berbasis web yang dikembangkan melalui metode Waterfall. Diharapkan dengan sistem ini dapat mengatasi problematika yang telah didefinisikan. Lingkup penelitian hanya dibatasi pada perancangan dan pengujian per-unit, sementara pengujian fungsi keseluruhan tidak dibahas. Kontribusi dari paper ini adalah menyediakan langkah-langkah implementasi Snipe-IT termasuk troubleshooting yang terjadi.
PEMODELAN SISTEM KOMUNIKASI CAHAYA TAMPAK BERBASIS DCO-OFDM DENGAN VITERBI DECODER PADA MATLAB Putra, Angga Pratama; Fuada, Syifaul; Adiono, Trio
Simetris: Jurnal Teknik Mesin, Elektro dan Ilmu Komputer Vol 10, No 2 (2019): JURNAL SIMETRIS VOLUME 10 NO 2 TAHUN 2019
Publisher : Universitas Muria Kudus

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (1531.034 KB) | DOI: 10.24176/simet.v10i2.3172

Abstract

Penggunaan sistem komunikasi cahaya tampak sebagai metode komunikasi alternatif selain RF didorong oleh beberapa faktor, salah satunya adalah penghematan energi karena sistem ini menggunakan satu devais yang sama untuk pencahayaan ruangan sekaligus komunikasi data yaitu LED. Penelitian ini bertujuan untuk memodelkan sistem komunikasi cahaya tampak berbasis multi-carrier modulation (yakni DCO-OFDM) dengan bantuan perangkat lunak MATLAB. Pada penelitian ini, sistem dimodelkan atas dua bagian yakni blok Digital Signal Processing (DSP) dan kanal optik. Blok DSP terdiri atas FFT, convolutional encoder, modulator-demodulator, interleaver-deinterleaver, dan synchronizer. Untuk error control coding (ECC) digunakan algoritma Viterbi decoder. Hasil penelitian menunjukkan bahwa frame DCO-OFDM telah berhasil didesain dan berdasarkan perhitungan matematis melalui pendekatan MATLAB, sistem VLC dapat bekerja dengan baik pada ruangan 5m x 5m x 3m, yakni BER = 0 untuk nilai minimum SNR = 10 dB, sementara nilai SNR tertinggi yang dapat dicapai adalah ~30 dB.
Nonlinear Dynamic Modeling of a Fixed-Wing Unmanned Aerial Vehicle: a Case Study of Wulung Triputra, Fadjar Rahino; Trilaksono, Bambang Riyanto; Adiono, Trio; Sasongko, Rianto Adhy; Dahsyat, Mohamad
Journal of Mechatronics, Electrical Power and Vehicular Technology Vol 6, No 1 (2015)
Publisher : Research Centre for Electrical Power and Mechatronics, Indonesian Istitutes of Sciences

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (3378.418 KB) | DOI: 10.14203/j.mev.2015.v6.19-30

Abstract

Developing a nonlinear adaptive control system for a fixed-wing unmanned aerial vehicle (UAV) requires a mathematical representation of the system dynamics analytically as a set of differential equations in the form of a strict-feedback systems. This paper presents a method for modeling a nonlinear flight dynamics of the fixed-wing UAV of BPPT Wulung in any conditions of the flight altitude and airspeed for the first step into designing a nonlinear adaptive controller. The model was formed into 10-DOF differential equations in the form of strict-feedback systems which separates the terms of elevator, aileron, rudder and throttle from the model. The model simulation results show the behavior of the flight dynamics of the Wulung UAV and also prove the compliance with the actual flight test results.
Desain Sistem Rumah Cerdas berbasis Topologi Mesh dan Protokol Wireless Sensor Network yang Efisien Adiono, Trio; Putra, Rachmad Vidya Wicaksana; Fathany, Maulana Yusuf; Adijarto, Waskita
INKOM Journal Vol 9, No 2 (2015)
Publisher : Pusat Penelitian Informatika - LIPI

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (779.868 KB) | DOI: 10.14203/j.inkom.429

Abstract

Dalam publikasi ini, kami mengusulkan sistem rumah cerdas berdasarkan dua pendekatan. Pendekatan pertama adalah arsitektur bertopologi mesh dan yang kedua adalah protokol Wireless Sensor Network (WSN) yang efisien. Sistem ini memiliki dua lingkungan kerja, indoor dan outdoor. Lingkungan indoor menggunakan sistem WSN, sedangkan lingkungan luar menggunakan sistem internet-cloud. Skema ini dikenal sebagai Internet-of-Things (IoT). Lingkungan indoor dan outdoor terhubung satu sama lain dengan menggunakan suatu jembatan penghubung. Sistem WSN dibentuk dari komponen-komponen WSN yang menggunakan topologi mesh. Setiap komponen dari WSN dirancang untuk mengimplementasikan protokol data efisien yang diusulkan. Untuk lingkungan outdoor, sistem internet-cloud yang ada adalah infrastruktur utama. Dengan demikian, sistem rumah cerdas ini dapat dipantau dan dikendalikan dari ponsel cerdas, kapan saja dan di mana saja, selama akses mobile data tersedia. Untuk evaluasi sistem, beberapa tes telahdilakukan untuk mendapatkan profil sistem.
Rapid Prototyping Methodology of Lightweight Electronic Drivers for Smart Home Appliances Trio Adiono; Rachmad Vidya Wicaksana Putra; Maulana Yusuf Fathany; Braham Lawas Lawu; Khilda Afifah; Muhammad Husni Santriaji; Syifaul Fuada
International Journal of Electrical and Computer Engineering (IJECE) Vol 6, No 5: October 2016
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (786.716 KB) | DOI: 10.11591/ijece.v6i5.pp2114-2124

Abstract

Many researches have been conducted in smart home topic. Mostly, they discussed on the specific aspect of application. On the other side, many applications still can be explored and attached into the system. Several main challenges in designing the application devices are system complexity, reliability, user friendliness, portability, and low power consumption. Thus, design of electronic driver is one of the key elements for overcoming these challenges. Moreover, the drivers have to comply the rules of smart home system, data protocol, and application purpose. Hence, we propose a rapid prototyping methodology on designing lightweight electronic drivers for smart home appliances. This methodology consists of three main aspects, namely smart home system understanding, circuitry concept, and programming concept. By using this method, functional and lightweight drivers can be achieved quickly without major changes and modifications in home electrical system. They can be remotely controlled and monitored anytime and from anywhere. For prototyping, we design several drivers to represent common electronic and mechanical based applications. Experimental results prove that the proposed design methodology can achieve the research target.
Noise Analysis of Trans-impedance Amplifier (TIA) in Variety Op Amp for use in Visible Light Communication (VLC) System Syifaul Fuada; Angga Pratama Putra; Yulian Aska; Trio Adiono
International Journal of Electrical and Computer Engineering (IJECE) Vol 8, No 1: February 2018
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (1032.288 KB) | DOI: 10.11591/ijece.v8i1.pp159-171

Abstract

VLC is a complex system with lots of challenges in its implementation. One of its problems is noise that originated from internal and external sources (sunlight, artificial light, etc). Internal noise is originated from active components of analog front-end (AFE) circuit, which will be discussed in this paper, especially on the trans-impedance amplifier (TIA) domain. The noise characteristics of AFE circuit in VLC system has been analyzed using the variety of available commercial Op Amp and different types of the photodiode (Si, Si-PIN, Si APD). The approach of this research is based on analytical calculus and simulation using MATLAB®. The results of this research show that the main factor that affecting the noise is en, the feedback resistor (Rf), and junction capacitor in the photodiode (Cj). Besides that, the design concept of multi channel TIA (8 channel) using IC Op Amp, with consideration of pin number of each Op Amp, supply needs, the initial value of Rf, converter to 8-DIP and feedback capacitor (Cf) channel, also discussed in this paper.
Reversed-Trellis Tail-Biting Convolutional Code (RT-TBCC) Decoder Architecture Design for LTE Trio Adiono; Ahmad Zaky Ramdani; Rachmad Vidya Wicaksana Putra
International Journal of Electrical and Computer Engineering (IJECE) Vol 8, No 1: February 2018
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (1109.512 KB) | DOI: 10.11591/ijece.v8i1.pp198-209

Abstract

Tail-biting convolutional codes (TBCC) have been extensively applied in communication systems. This method is implemented by replacing the fixed-tail with tail-biting data. This concept is needed to achieve an effective decoding computation. Unfortunately, it makes the decoding computation becomes more complex. Hence, several algorithms have been developed to overcome this issue in which most of them are implemented iteratively with uncertain number of iteration. In this paper, we propose a VLSI architecture to implement our proposed reversed-trellis TBCC (RT-TBCC) algorithm. This algorithm is designed by modifying direct-terminating maximum-likelihood (ML) decoding process to achieve better correction rate. The purpose is to offer an alternative solution for tail-biting convolutional code decoding process with less number of computation compared to the existing solution. The proposed architecture has been evaluated for LTE standard and it significantly reduces the computational time and resources compared to the existing direct-terminating ML decoder. For evaluations on functionality and Bit Error Rate (BER) analysis, several simulations, System-on-Chip (SoC) implementation and synthesis in FPGA are performed.
An SoC Architecture for Real-Time Noise Cancellation System Using Variable Speech PDF Method Trio Adiono; Aditya F. Ardyanto; Nur Ahmadi; Idham Hafizh; Septian G. P. Putra
International Journal of Electrical and Computer Engineering (IJECE) Vol 5, No 6: December 2015
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (572.191 KB) | DOI: 10.11591/ijece.v5i6.pp1336-1346

Abstract

This paper presents the architecture and implementation of system-on-chip (SoC) for realtime noise cancellation system which exploits variable speech probability density function (PDF) and maximum a posteriori (MAP) estimation rule as noise cancelling algorithm. The hardware software co-design approach is employed to achieve real-time performance while considering ease of implementation and design flexibility. The software module utilizes LEON SPARC-v8 and FPU co-prosessor as processing unit. The AMBA based Hanning Filter and FFT/IFFT are utilized as processing accelerator modules to increase system performance. The FFT/IFFT module employs custom Radix-2^2 Single Delay Feedback (R2^2SDF). In order to deliver high data transfer rate between buffer and hardware accelerators, the DMA controller is incorporated. The overall system implementation utilizes 18,500 logic elements and consumes 21.87 kB of memory. The system takes only 0.69 ms latency which is appropriate for real-time application. An FPGA Altera DE2-70 is used for prototyping with both algorithms and the noise cancellation function have been verified.
Noise Analysis in VLC Optical Link based Discrette OP-AMP Trans-impedance Amplifier (TIA) Syifaul Fuada; Trio Adiono; Angga Pratama Putra; Yulian Aska
TELKOMNIKA (Telecommunication Computing Electronics and Control) Vol 15, No 3: September 2017
Publisher : Universitas Ahmad Dahlan

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.12928/telkomnika.v15i3.5737

Abstract

To design Visible Light Communication (VLC) system, there are several requirements that needs to be met. One of the requirements is an active component selection (e.g. Op Amp). As an ideal communication system, VLC system has to be able to provides wide bandwidth access with minimum noise. The Transimpedance amplifiers (TIAs) is one of main components in optical system which is placed in the first stage of receiver system. It is used to convert the current output from photodiode to voltage. We have designed a 1 MHz fGBW TIA with low noise (in μVrms range). This paper aims to explain the design and implementation of TIA circuit with photovoltaic topology which cover empirical calculations and simulation of TIA’s bandwidth and its noise sources, i.e. resistor feedback noise, current noise, voltage noise and total noise based on RSS. The OP-AMP is chosen from Texas Instruments product, OPA 380, and photodiode is chosen from OSRAM, SFH213, then simulated by TINA-TI SPICE® software. The noise in TIA circuit is analyzed clearly. The developed kit is ready to be implemented in VLC system.
Towards cognitive artificial intelligence device: an intelligent processor based on human thinking emulation Catherine Olivia Sereati; Arwin Datumaya Wahyudi Sumari; Trio Adiono; Adang Suwandi Ahmad
TELKOMNIKA (Telecommunication Computing Electronics and Control) Vol 18, No 3: June 2020
Publisher : Universitas Ahmad Dahlan

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.12928/telkomnika.v18i3.14835

Abstract

The intervention of computer technology began the era of a more intelligent and independent instrumentation system based on intelligent methods such as artificial neural networks, fuzzy logic, and genetic algorithm. On the other hand, processor with artificial cognitive ability has also been discovered in 2016. The architecture of the processor was designed based on knowledge growing system (KGS) algorithm, a new concept in artificial intelligence (AI) which is focused on the emulation of the process of the growing of knowledge in human brain after getting new information from human sensory organs. KGS is considered as the main method of a new perspective in AI called as cognitive artificial intelligence (CAI). The design is to obtain the architecture of the data path of the processor. We found that the complexity of the processor circuit is determined by the number of combinations of sensors and hypotheses as the main inputs to the processor. This paper addresses the development of an intelligence processor based on cognitive AI in order to realize an Intelligence Instrumentation System. The processor is implemented in field programmable gate array (FPGA) and able to perform human thinking emulation by using KGS algorithm.
Co-Authors Abdurrahman, Imran Adang Suwandi Ahmad Adijarto, Waskita Adinugraha, Erick Aditia Rifai Aditya F. Ardyanto Afandi, Najma Khansa Alya Agung, Anton Toni Agung, Anton Toni Ahmad Zaky Ramdani Alfi, Feiza Angga Pradana Angga Pradana Angga Pradana Angga Pratama Putra Angga Pratama Putra Angga Pratama Putra Angga Pratama Putra Angga Pratama Putra, Angga Pratama Arwin Datumaya Wahyudi Sumari Bambang Riyanto Trilaksono Braham Lawas Lawu Catherine Olivia Sereati Dawani, Febri Erick Adinugraha Erwin Setiawan Erwin Setiawan Erwin Setiawan, Erwin Fadjar Rahino Triputra Fadjar Rahino Triputra, Fadjar Rahino Farkhad Ihsan Hariadi Fathany, Maulana Yusuf Guno, Yomi Hans G. Kerkhoff Hans Kasan Hans Kasan Hariadi, Farkhad Ihsan Haslina Arshad Hidayat, Asyaraf Hiroaki Kunieda Idham Hafizh Imran Abdurrahman Infall Syafalni Irfan Gani Purwanda Joko Suryana Kasan, Hans Khilda Afifah Leonardi Paris Hasugian Maulana Yusuf Fathany Maulana Yusuf Fathany Maulana Yusuf Fathany Mohamad Dahsyat Mohamad Dahsyat, Mohamad Muhammad Arif Sulaiman Muhammad Husni Santriaji Nur Afyfah Suwadi Nur Ahmadi Nur Ahmadi Nurfitri Anbarsanti Octaviany, Siti Vivi Pamungkas, Sandi Purwanda, Irfan Gani Rachmad Vidya Wicaksana Putra Rachmad Vidya Wicaksana Putra Rachmad Vidya Wicaksana Putra Rachmad Vidya Wicaksana Putra Rachmad Vidya Wicaksana Putra Rachmad Vidya Wicaksana Putra Rachmad Vidya Wicaksana Putra Rella Mareta Rianto Adhy Sasongko Rianto Adhy Sasongko, Rianto Adhy Rifai, Aditia Ruzzakiah Jenal Septian G. P. Putra Sinantya Feranti Anindya SINANTYA FERANTI ANINDYA, SINANTYA FERANTI Suksmandhira Harimurti Sulaiman, Muhammad Arif Syifaul Fuada Waskita Adijarto Yulian Aska Yulian Aska Yulian Aska Yulian Aska Yulian Aska, Yulian Zainal Rasyid Mahayuddin