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Nanda B. S.
P E S College of Engineeing
Computer Science & IT Electrical & Electronics Engineering

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Modeling and simulation of graphene field effect transistor (GFET) Nanda B. S.; Puttaswamy P. S.
International Journal of Electrical and Computer Engineering (IJECE) Vol 9, No 6: December 2019
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (1120.554 KB) | DOI: 10.11591/ijece.v9i6.pp4826-4835

Abstract

Graphene based top-gated Field effect transistor (GFET) is designed and simulated using the device simulator packages. The paper describes fabrication process and the device simulation aspects of the GFET device. Two devices with different gate lengths of 200nm and 350nm are simulated. Device simulations are carried out in open source TCAD software package. The results indicate a depletion FET type operation in which ON/OFF current ratio of 2.25 is obtained.
Co-Authors Puttaswamy P. S.