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All Journal International Journal of Power Electronics and Drive Systems (IJPEDS)
Hur Jedi
University of Kufa
Control & Systems Engineering Electrical & Electronics Engineering

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A high-performance multilevel inverter with reduced power electronic devices Amer Chlaihawi; Adnan Sabbar; Hur Jedi
International Journal of Power Electronics and Drive Systems (IJPEDS) Vol 11, No 4: December 2020
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/ijpeds.v11.i4.pp1883-1889

Abstract

This paper introduces a new topology of multilevel inverter, which is able to operate at high performance. This proposed circuit achieves requirements of reduced number of switches, gate-drive circuits, and high design flexibility. In most cases fifteen-level inverters need at least twelve switches. The proposed topology has only ten switches. The inverter has a quasi-sine output voltage, which is formed by level generator and polarity changer to produce the desired voltage and current waveforms. The detailed operation of the proposed inverter is explained. The theoretical analysis and design procedure are given. Simulation results are presented to confirm the analytical approach of the proposed circuit. A 15-level and 31-level multilevel inverters were designed and tested at 50 Hz.
A 1 MHz soft-switching boost DC-DC converter with matching network Hur Jedi; Ghasan Ali Hussain
International Journal of Power Electronics and Drive Systems (IJPEDS) Vol 13, No 4: December 2022
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/ijpeds.v13.i4.pp2226-2234

Abstract

This paper introduces a high-performance zero-voltage-switching (ZVS) boost converter, which is capable to operate under different load currents. By utilizing matching network, the proposed topology can achieve ZVS over a wide range of input voltages. Due to the switching loss is minimized, the proposed circuit is suitable for operation at switching frequencies on the order of several MHz. Steady-state analysis and detailed description of the proposed circuit are discussed. The power-loss and design procedure are introduced. The proposed converter has been simulated to verify the presented analytical approach at 1 MHz and deliver 80 W output. The peak power efficiency achieves 94.2%.
Co-Authors Adnan Sabbar Amer Chlaihawi Ghasan Ali Hussain