Article Per Year (5 Year)
p-Index From 2020 - 2025
0
P-Index
This Author published in this journals
All Journal International Journal of Reconfigurable and Embedded Systems (IJRES)
Midhun M
ISRO Satellite Centre Bangalore
Economics, Econometrics & Finance

Published : 1 Documents Claim Missing Document
Claim Missing Document
Check
Articles

Found 1 Documents
Search

 1 
Realization of Programmable BPSK Demodulator-Bit Synchronizer using Multirate Processing Anshuman Sharma; Abdul Hafeez Syed; Midhun M; M R Raghavendra
International Journal of Reconfigurable and Embedded Systems (IJRES) Vol 3, No 1: March 2014
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (214.594 KB) | DOI: 10.11591/ijres.v3.i1.pp18-24

Abstract

This paper presents the design and implementation of programmable BPSK demodulator and bit synchronizer. The demodulator is based on the Costas loop design whereas the bit synchronizer is based on Gardner timing error detector. The advantage of this design is that it offers programmability using multi-rate processing and does not rely on computation of filter coefficients, NCO angle input for each specific data rate and thus avoids computational complexities. The algorithm and its application were verified on Matlab-Simulink and were implemented on ALTERA platform. A 32 kHz BPSK demodulator–bit synchronizer pair catering for a data rate from 1kbps to 8kbps was implemented.
Co-Authors Abdul Hafeez Syed Anshuman Sharma M R Raghavendra