Article Per Year (5 Year)
p-Index From 2021 - 2026
0
P-Index
This Author published in this journals
All Journal International Journal of Reconfigurable and Embedded Systems (IJRES)
Arash Farhadi Beldachi
Bristol University
Economics, Econometrics & Finance

Published : 1 Documents Claim Missing Document
Claim Missing Document
Check
Articles

Found 1 Documents
Search

 1 
Configurable Router Design for Dynamically Reconfigurable Systems based on the SoCWire NoC Arash Farhadi Beldachi; Mohammad Hosseinabady; Jose Luis Nunez-Yanez
International Journal of Reconfigurable and Embedded Systems (IJRES) Vol 2, No 1: March 2013
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (3419.366 KB) | DOI: 10.11591/ijres.v2.i1.pp27-48

Abstract

New Field Programmable Gate Arrays (FPGAs) are capable of implementing complete multi-core System-on-Chip (SoC) with the possibility of modifying the hardware configuration at run-time with partial dynamic reconfiguration. The usage of a soft reconfigurable Network-on-Chip (NoC) to connect these cores is investigated in this paper. We have used a standard switch developed with the objective of supporting dynamically reconfigurable FPGAs as the starting point to create a novel configurable router. The configurable router uses distributed routing suitable for regular topologies and can vary the number of local ports and communication ports to build multi dimensional networks (i.e., 2D and 3D) with different topologies. The evaluation results show that the selection of the ideal router is different depending on traffic patterns and design objectives. Overall, the mesh network with a four local ports router offers a higher level of performance with lower complexity compared to the traditional mesh with one local port router.
Co-Authors Jose Luis Nunez-Yanez Mohammad Hosseinabady