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All Journal Bulletin of Electrical Engineering and Informatics Bulletin of Electrical Engineering and Informatics Bulletin of Electrical Engineering and Informatics Indonesian Journal of Electrical Engineering and Computer Science
Fazrena Azlee Hamid
Universiti Tenaga Nasional
Computer Science & IT Electrical & Electronics Engineering Engineering

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Configurations of memristor-based APUF for improved performance Julius Han Loong Teo; Noor Alia Noor Hashim; Azrul Ghazali; Fazrena Azlee Hamid
Bulletin of Electrical Engineering and Informatics Vol 8, No 1: March 2019
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (635.38 KB) | DOI: 10.11591/eei.v8i1.1401

Abstract

The memristor-based arbiter PUF (APUF) has great potential to be used for hardware security purposes. Its advantage is in its challenge-dependent delays, which cannot be modeled by machine learning algorithms. In this paper, further improvement is proposed, which are circuit configurations to the memristor-based APUF. Two configuration aspects were introduced namely varying the number of memristor per transistor, and the number of challenge and response bits. The purpose of the configurations is to introduce additional variation to the PUF, thereby improve PUF performance in terms of uniqueness, uniformity, and bit-aliasing; as well as resistance against support vector machine (SVM). Monte Carlo simulations were carried out on 180 nm and 130 nm, where both CMOS technologies have produced uniqueness, uniformity, and bit-aliasing values close to the ideal 50%; as well as SVM prediction accuracies no higher than 52.3%, therefore indicating excellent PUF performance.
Configurations of memristor-based APUF for improved performance Julius Han Loong Teo; Noor Alia Noor Hashim; Azrul Ghazali; Fazrena Azlee Hamid
Bulletin of Electrical Engineering and Informatics Vol 8, No 1: March 2019
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (1009.692 KB) | DOI: 10.11591/eei.v8i1.1401

Abstract

The memristor-based arbiter PUF (APUF) has great potential to be used for hardware security purposes. Its advantage is in its challenge-dependent delays, which cannot be modeled by machine learning algorithms. In this paper, further improvement is proposed, which are circuit configurations to the memristor-based APUF. Two configuration aspects were introduced namely varying the number of memristor per transistor, and the number of challenge and response bits. The purpose of the configurations is to introduce additional variation to the PUF, thereby improve PUF performance in terms of uniqueness, uniformity, and bit-aliasing; as well as resistance against support vector machine (SVM). Monte Carlo simulations were carried out on 180 nm and 130 nm, where both CMOS technologies have produced uniqueness, uniformity, and bit-aliasing values close to the ideal 50%; as well as SVM prediction accuracies no higher than 52.3%, therefore indicating excellent PUF performance.
Configurations of memristor-based APUF for improved performance Julius Han Loong Teo; Noor Alia Noor Hashim; Azrul Ghazali; Fazrena Azlee Hamid
Bulletin of Electrical Engineering and Informatics Vol 8, No 1: March 2019
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (1009.692 KB) | DOI: 10.11591/eei.v8i1.1401

Abstract

The memristor-based arbiter PUF (APUF) has great potential to be used for hardware security purposes. Its advantage is in its challenge-dependent delays, which cannot be modeled by machine learning algorithms. In this paper, further improvement is proposed, which are circuit configurations to the memristor-based APUF. Two configuration aspects were introduced namely varying the number of memristor per transistor, and the number of challenge and response bits. The purpose of the configurations is to introduce additional variation to the PUF, thereby improve PUF performance in terms of uniqueness, uniformity, and bit-aliasing; as well as resistance against support vector machine (SVM). Monte Carlo simulations were carried out on 180 nm and 130 nm, where both CMOS technologies have produced uniqueness, uniformity, and bit-aliasing values close to the ideal 50%; as well as SVM prediction accuracies no higher than 52.3%, therefore indicating excellent PUF performance.
Ring oscillator physically unclonable function using sequential ring oscillator pairs for more challenge-response-pairs Julius Han Loong Teo; Noor Alia Nor Hashim; Azrul Ghazali; Fazrena Azlee Hamid
Indonesian Journal of Electrical Engineering and Computer Science Vol 13, No 3: March 2019
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/ijeecs.v13.i3.pp892-901

Abstract

The ring oscillator physically unclonable function (ROPUF) is one of the several types of PUF that has great potential to be used for security purposes. An alternative ROPUF design is proposed with two major differences. Firstly, the memristor is included in the ring oscillators as it is claimed to produce a more random oscillation frequency. Other reasons are its memory-like properties and variable memristance, relative compatibility with CMOS, and small size. Secondly, a different method of generating the response is implemented whereby a sequence of selection of ring oscillator pairs are used to generate a multiple bit response, rather than using only one ring oscillator pair to generate a single bit response. This method significantly expands the set of challenge-response pairs. The proposed memristor-based ROPUF shows 48.57%, 51.43%, and 51.43% for uniqueness, uniformity, and bit-aliasing, respectively. Also, modelling by support vector machine (SVM) on the proposed memristor-based ROPUF only shows 61.95% accuracy, thereby indicating strong resistance against SVM.
Memristor based ring oscillators true random number generator with different window functions for applications in cryptography Noor Alia Nor Hashim; Julius Teo Han Loong; Azrul Ghazali; Fazrena Azlee Hamid
Indonesian Journal of Electrical Engineering and Computer Science Vol 14, No 1: April 2019
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/ijeecs.v14.i1.pp201-209

Abstract

Cryptographic applications require numbers that are random and pseudorandom. Keys must be produced in a random manner in order to be used in common cryptosystems. Random or pseudorandom inputs at different terminals are also required in a lot of cryptographic protocols. For example, producing digital signatures using supporting quantities or in verification procedures that requires generating challenges. Random number generation is an important part of cryptography because there are flaws in random number generation that can be taken advantage by attackers that compromised encryption systems that are algorithmically secure. True random number generators (TRNGs) are the best in producing random numbers. This paper presents a True Random Number Generator that uses memristor based ring oscillators in the design. The designs are implemented in 0.18 µm complementary metal oxide semiconductor (CMOS) technology using LT SPICE IV. Different window functions for the memristor model was applied to the TRNG and compared. Statistical tests results of the output random numbers produced showed that the proposed TRNG design can produce random output regardless of the window function.
Co-Authors Azrul Ghazali Julius Han Loong Teo Julius Teo Han Loong Noor Alia Noor Hashim Noor Alia Nor Hashim