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All Journal Bulletin of Electrical Engineering and Informatics Bulletin of Electrical Engineering and Informatics Bulletin of Electrical Engineering and Informatics Indonesian Journal of Electrical Engineering and Computer Science
Fazrena Azlee Hamid
Universiti Tenaga Nasional
Computer Science & IT Electrical & Electronics Engineering Engineering

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Journal : Bulletin of Electrical Engineering and Informatics

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Configurations of memristor-based APUF for improved performance Julius Han Loong Teo; Noor Alia Noor Hashim; Azrul Ghazali; Fazrena Azlee Hamid
Bulletin of Electrical Engineering and Informatics Vol 8, No 1: March 2019
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (1009.692 KB) | DOI: 10.11591/eei.v8i1.1401

Abstract

The memristor-based arbiter PUF (APUF) has great potential to be used for hardware security purposes. Its advantage is in its challenge-dependent delays, which cannot be modeled by machine learning algorithms. In this paper, further improvement is proposed, which are circuit configurations to the memristor-based APUF. Two configuration aspects were introduced namely varying the number of memristor per transistor, and the number of challenge and response bits. The purpose of the configurations is to introduce additional variation to the PUF, thereby improve PUF performance in terms of uniqueness, uniformity, and bit-aliasing; as well as resistance against support vector machine (SVM). Monte Carlo simulations were carried out on 180 nm and 130 nm, where both CMOS technologies have produced uniqueness, uniformity, and bit-aliasing values close to the ideal 50%; as well as SVM prediction accuracies no higher than 52.3%, therefore indicating excellent PUF performance.
Co-Authors Azrul Ghazali Julius Han Loong Teo Julius Teo Han Loong Noor Alia Noor Hashim Noor Alia Nor Hashim