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R. Bensaraj
Annamalai University

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Hardware Implementation of Cascaded Hybrid Multilevel Inverter with Reduced Number of Switches Chinnapettai Ramalingam Balamurugan; S.P. Natarajan; T.S. Anandhi; R. Bensaraj
Indonesian Journal of Electrical Engineering and Computer Science Vol 3, No 2: August 2016
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/ijeecs.v3.i2.pp314-322

Abstract

This paper presents the comparison of various multicarrier Pulse Width Modulation (PWM) techniques for the Cascaded Hybrid Multi Level Inverter (CHBMLI). Due to switch combination redundancies, there are certain degrees of freedom to generate the five level AC output voltage. This paper presents the use of Control Freedom Degree (CFD) combination. The effectiveness of the PWM strategies developed using CFD are demonstrated by simulation and experimentation.  The simulation results indicate that the chosen five level inverter triggered by the developed Phase Disposition(PD), Phase Opposition and Disposition(POD), Alternate Phase Opposition and Disposition (APOD), Carrier Overlapping (CO), Phase Shift (PS) and Variable Frequency (VF) PWM strategies developed are implemented in real time using FPGA. The simulation and experimental outputs closely match with each other validating the strategies presented.
Co-Authors Chinnapettai Ramalingam Balamurugan S.P. Natarajan T.S. Anandhi