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Musaab Mohammed Jasim
University of Diyala

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Reliability-based routing metric for UAVs networks Musaab Mohammed Jasim; Hayder Khaleel AL-Qaysi; Yousif Allbadi
Indonesian Journal of Electrical Engineering and Computer Science Vol 21, No 3: March 2021
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/ijeecs.v21.i3.pp1771-1783

Abstract

As a result of technological advances in robotic systems, electronic sensors, and communication techniques, the production of unmanned aerial vehicle (UAV) systems has become possible. Their easy installation and flexibility led these UAV systems to be used widely in both military and civilian applications. Note that the capability of one UAV is however limited. Nowadays, a multi-UAV system is of special interest due to the ability of its associate UAV members either to coordinate simultaneous coverage of large areas or to cooperate to achieve common goals/targets. This kind of cooperation/coordination requires a reliable communication network with a proper network model to ensure the exchange of both control and data packets among UAVs. Such network models should provide all-time connectivity to avoid dangerous failures or unintended consequences. Thus, the multi-UAV system relies on communication to operate. Flying ad hoc network (FANET) is moreover considered as a sophisticated type of wireless ad hoc network among UAVs which solved the communication problems into other network models. Along with the FANET’s unique features, challenges and open issues are also discussed especially in the routing protocols approach. We will try to present the expected transmission account metric with a new algorithm for reliability. In addition to this new algorithm mechanism, the metric takes into account the relative speed between UAVs, and thus the increase of the fluctuations in links between UAVs has been detected. Accordingly, the results show that the function of the AODV routing protocol with this metric becomes effective in high mobility environments.
Design of very low-voltages and high-performance CMOS gate-driven operational amplifier Hayder Khaleel AL-Qaysi; Musaab Mohammed Jasim; Siraj Manhal Hameed
Indonesian Journal of Electrical Engineering and Computer Science Vol 20, No 2: November 2020
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/ijeecs.v20.i2.pp670-679

Abstract

This paper presents the description and analysis of the design and HSPICE-based simulation results of very low-voltages (LVs) power supplies and high-performance specifications CMOS gate-driven (GD) operational amplifier (Op-Amp) circuit. The very LVs CMOS GD Op-Amp circuit designed using 90nm CMOS technology parameters and the folded cascode (FC) technique employed in the differential input stage. The HSPICE simulation results demonstrate that the overall gain is 73.1dB, the unity gain bandwidth is 14.9MHz, the phase margin is , the total power dissipation is 0.91mW, the output voltage swing is from 0.95V to 1V, the common-mode rejection ratio is dB, the equivalent input-referred noise voltage is 50.94  at 1MHz, the positive slew rate is 11.37 , the negative slew rate is 11.39 , the settling time is 137 , the positive power-supply rejection ratio is 74.2dB, and the negative power-supply rejection ratio is 80.1dB. The comparisons of simulation results at 1V and 0.814V power supplies’ voltages of the very LVs CMOS GD Op-Amp circuit demonstrate that the circuit functions with perfect performance specifications, and it is suitable for many considerable applications intended for very LVs CMOS Op-Amp circuits.
Co-Authors Hayder Khaleel AL-Qaysi Siraj Manhal Hameed Yousif Allbadi