Article Per Year (5 Year)
p-Index From 2021 - 2026
0.23
P-Index
This Author published in this journals
All Journal Indonesian Journal of Electrical Engineering and Computer Science
Nuthan Prasad Venkatesh
M.S. Ramaiah Institute of Technology

Published : 1 Documents Claim Missing Document
Claim Missing Document
Check
Articles

Found 1 Documents
Search

 1 
Delay-power efficient VLSI architecture design for robust proportionate adaptive filter Gangadharaiah Soralamavu Lakshmaiah; Chikkajala Krishnappa Narayanappa; Divya Muddenahalli Narasimhaiah; Munivenkatappa Nagabhushanam; Nuthan Prasad Venkatesh; Bhanu Darshan Srinivas Shobhavathi
Indonesian Journal of Electrical Engineering and Computer Science Vol 26, No 1: April 2022
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/ijeecs.v26.i1.pp67-74

Abstract

This paper proposes the robust proportionate adaptive filtering algorithms and their respective efficient very large-scale integration (VLSI) architectures for sparse system identification under impulsive noise, several types of algorithms are combined to obtain optimum results. Here, we rendered a relative analysis on these algorithms and the algorithms are mapped on to the hardware to show that the improvement is obtained with respect to convergence rate and hardware complexity of VLSI architectures and has negligible hardware overhead with improved robustness. Good performance and convergence rate is obtained by combining the delayed μ-law proportionate (DMP) and least mean logarithmic square (LMLS) algorithms i.e. delayed µ-law proportionate least mean logarithmic square (DMP LMLS). Robust proportionate adaptive filter is coded in system verilog and synthesized using cadence genus compiler with 90 nm technology library.
Co-Authors Bhanu Darshan Srinivas Shobhavathi Chikkajala Krishnappa Narayanappa Divya Muddenahalli Narasimhaiah Gangadharaiah Soralamavu Lakshmaiah Munivenkatappa Nagabhushanam