Irman Idris
Microelectronic Center, ITB, Jl. Ganesha No.10, Bandung 40132. School of Electrical Engineering and Informatics, ITB, Jl. Ganesha No.10, Bandung 40132

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Experimental Study of an Aluminum-Polysilicon Thermopile for Implementation of Airflow Sensor on Silicon Chip Subandi, Ayub; Idris, Irman; Ahmad, Adang Suwandi
Journal of Engineering and Technological Sciences Vol 39, No 2 (2007)
Publisher : ITB Journal Publisher, LPPM ITB

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (169.272 KB) | DOI: 10.5614/itbj.eng.sci.2007.39.2.2

Abstract

A multi-directional airflow sensor has been realized. The essential part of  the  considered  sensor  is  a  thermopile  configuration,  which  enables  the measurement  of  flow  speed  and  flow  direction.  The  thermopile  is  a  series arrangement  of  eight  thermocouples.  A  thermocouple  converts  a  difference  in temperature  into  an  electrical  signal,  by  means  of  the  Seebeck  effect .  The thermocouples  are  made  of  aluminum-N-type  polysilicon  junctions.  The incoming  flow  is  heated  and  the  degree  of  heat  transfer  by  convection  to  the flow, depends on the speed of the flow; the faster the flow the smaller the heat transfer,  which leads to a smaller (Seebeck) output  voltage of  the thermopiles. After  signal  conditioning  -  i.e.,  filtering  and  amplification  by  means  of  an amplification system  -  the electrical output signals of the thermopiles are further signal-processed by applying analog-to-digital signal conversion, so that finally the flow speed and the flow direction can be properly displayed on a computer screen. The measured values of the Seebeck coefficient or thermopower (S) were in the range of: 0.43 to 0.68 mV/K which are in good agreement with the values found in the literature: 0.5 to 0.7 mV/K. Moreover, it  was found that the  flow speed  U is  proportional  to  the  reciprocal  value  of  the  square  of  the  output voltage of the outgoing thermopile.
Perancangan, Fabrikasi, dan Karakterisasi Transistor Bipolar: Perancangan, Fabrikasi, dan Karakterisasi Transistor Bipolar Subandi, Ayub; Idris, Irman
Komputika : Jurnal Sistem Komputer Vol. 14 No. 1 (2025): Komputika: Jurnal Sistem Komputer
Publisher : Computer Engineering Departement, Universitas Komputer Indonesia

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.34010/komputika.v14i1.15859

Abstract

Bipolar transistors still play an important and irreplaceable role in the application of electronic systems, even though almost all logic circuits, including microprocessors and memory, consist of MOS (Metal Oxide Semiconductor) transistors. They are widely used today due to their advantage higher switching speed compared to MOS technology and their ability to conduct high currents. In this research, the design, fabrication, and characterization of bipolar transistor were carried out. The design was done using L-Edit software and the converted to glass using a photoreduction camera. The base material for the transistors was n-type epitaxial wafer with a layer depth of 3 μm. The fabrication process involved wafer cleaning, oxidation, diffusion, photolithography, etching, metallization, and metal strengthening. Due to the use of a thin epitaxial wafer, thermal diffusion followed by a drive-in process was avoided to prevent penetration through the epitaxial layer, resulting in a low current gain (β) of only 1.5 times. On the other hand, using a thicker epitaxial layer would create difficulties during the isolation process. The success of each fabrication step was determined by measurement on test patterns, including resistor resistance measurement, diode characterization, and determination of diffusion depth using dummy samples. The measurement results showed an emitter junction depth of 0.3 μm, and a base layer width of 1.1 μm. These results indicate that the transistor was successfully fabrication, although with a low current gain. Keywords – MOS; Epitaxial wafer; Diffusion; Current amplifier; Dummy. 
FABRIKASI CHIP MASKED-READ ONLY MEMORY 112 BITS DENGAN TEKNOLOGI N-CHANNEL METAL OXIDE SEMICONDUCTOR (N-MOSFET) Subandi, Ayub; Idris, Irman
Komputika : Jurnal Sistem Komputer Vol. 2 No. 2 (2013): Komputika
Publisher : Computer Engineering Departement, Universitas Komputer Indonesia

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.34010/komputika.v2i2.5168

Abstract

Pada penelitian ini, dilakukan fabrikasi rangkaian terintegrasi (IC=Integrated Circuit) Masked-ROM 112 bits dengan teknologi NMOS (n-channel Metal Oxide Semiconductor) berikut gerbang-gerbang logika. Gerbang logika yang dipakai adalah inverter, AND, dan NOR. Proses-proses yang digunakan diantaranya pencucian wafer, fotolitografi, oksidasi, deposisi polisilikon, dan metalisasi Aluminium. Dari hasil pengukuran terhadap divais yang dibuat diperoleh threshold voltage positif. Karakterisasi gerbang logika secara umum telah tercapai. Akan tetapi masked-ROM yang difabrikasi masih tidak sesuai dengan yang diharapkan.