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All Journal International Journal of Electrical and Computer Engineering IAES International Journal of Artificial Intelligence (IJ-AI) Indonesian Journal of Electrical Engineering and Computer Science
Nataraju, Chaitra Soppinahally
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Computer Science & IT Electrical & Electronics Engineering Engineering

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Low-power body-coupled transceiver for miniaturized body area networks Nataraju, Chaitra Soppinahally; Karanam Sreekantha, Desai; V. S. S. S. S.Sairam, Kanduri
International Journal of Electrical and Computer Engineering (IJECE) Vol 14, No 3: June 2024
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/ijece.v14i3.pp3522-3532

Abstract

As wearable devices continue to proliferate, seamlessly integrating them into wireless body-area networks (WBANs) becomes increasingly crucial. Body-coupled communication (BCC) emerges as a promising WBAN technology, utilizing the human body itself as a transmission channel. This paper presents a novel BCC transceiver designed for efficiency and miniaturization. The proposed transceiver prioritizes reliable data transmission with a convolutional encoder. It leverages a simple direct digital synthesizer (DDS) for frequency shift keying (FSK) modulation, minimizing chip area. At the receiver, a Viterbi decoder (VD) ensures accurate data recovery. This design shines in its resource efficiency. It occupies less than 1% of an Artix-7 FPGA, operates at 268.77 MHz with a mere 111 mW power consumption, and achieves a remarkable data rate of 13.78 Mbps. This translates to a hardware efficiency of 44.46 Kbps/slice, surpassing existing transceivers. Moreover, the BCC transceiver exhibits a stellar bit error rate (BER) of over 10⁻⁷ under realistic body channel conditions. Overall, this work presents a highly efficient BCC transceiver with significant improvements in chip area, power consumption, and data rate compared to existing designs. This paves the way for practical and miniaturized WBAN solutions for future wearable applications.
Hardware-realized secure transceiver for human body communication in wireless body area networks Nataraju, Chaitra Soppinahally; Sreekantha, Desai Karanam; Sairam, Kanduri VSSSS
Indonesian Journal of Electrical Engineering and Computer Science Vol 35, No 1: July 2024
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/ijeecs.v35.i1.pp601-609

Abstract

Wireless body area networks (WBANs), featuring wearable and implantable devices for collecting physiological data are increasingly critical in healthcare for enabling continuous remote monitoring, diagnostic improvements, and treatment optimization. Secure communication within WBANs is essential to protect sensitive health data from unauthorized access and manipulation. This paper introduces a novel secure digital (SD)- human body communication (HBC) Transceiver (TR) system, tailored for WBAN applications, that prioritizes security and offers significant enhancements in size, power efficiency, speed, and data transmission efficiency over current solutions. Leveraging a combination of frequency-selective (FS) digital transmission with walsh codes (WCs) or quadrature amplitude modulation (QAM), and incorporating one-round encryption and decryption modules, the system complies with the IEEE 802.15.6 standard, ensuring broad compatibility. Specifically, the QAM-based SD-HBC TR system exhibits a 4% reduction in chip area, a 7.6% increase in operating frequency, a 3.4% decrease in power consumption, a 27.5% reduction in latency, and improvements of 33% in throughput and 35.5% in efficiency. Importantly, it achieves a bit error rate (BER) of up to 10-8 , demonstrating high reliability across communication methods. This research significantly advances secure communication in WBANs, offering a promising approach for enhancing the reliability, efficiency, and security of healthcare monitoring technologies.
Lightweight mutual authentication protocol for resource-constrained radio frequency identification tags with PRINCE cipher Naik, Mahendra Shridhar; Sreekantha, Desai Karanam; Sairam, Kanduri V S S S S; Nataraju, Chaitra Soppinahally
IAES International Journal of Artificial Intelligence (IJ-AI) Vol 14, No 4: August 2025
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/ijai.v14.i4.pp3435-3443

Abstract

Radio frequency identification (RFID) is a key technology for the internet of things (IoT), with widespread applications in the commercial, healthcare, enterprise, and community sectors. However, privacy and security concerns remain with RFID systems. This manuscript presents a novel RFID-based mutual authentication protocol (MAP) using the PRINCE cipher to address these concerns. The proposed MAP leverages a PRINCE cipher architecture capable of both encryption and decryption based on a mode signal. It performs five encryption and two decryption processes during tag and reader mutual authentication, with updated seed values ensuring synchronization and secure data communication. The PRINCE cipher implementation utilizes less than 1% of slices, operates at 226 MHz with a latency of 3.5 clock cycles (CC), and has a throughput of 4.125 Gbps. The complete RFID-based MAP consumes 721 mW of power, occupies 2% of the chip area, and achieves a latency of 35.5 CC and a throughput of 262 Mbps. This represents a 25% reduction in latency, a 40% increase in throughput, and a 30% decrease in execution time compared to existing MAP approaches. The findings demonstrate the potential of the proposed MAP to enhance latency, throughput, and execution time, offering a promising solution for secure and efficient RFID authentication.
Co-Authors Karanam Sreekantha, Desai Naik, Mahendra Shridhar Sairam, Kanduri V S S S S Sairam, Kanduri VSSSS Sreekantha, Desai Karanam V. S. S. S. S.Sairam, Kanduri