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All Journal International Journal of Electrical and Computer Engineering IAES International Journal of Artificial Intelligence (IJ-AI)
Gowda Puttaswamy, Nandini
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Computer Science & IT Electrical & Electronics Engineering Engineering

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An efficient adaptive reconfigurable routing protocol for optimized data packet distribution in network on chips Goravi Sukumar, Pavithra; Krishnaiah, Modugu; Velluri, Rekha; Satish, Pooja; Nagaraju, Sharmila; Gowda Puttaswamy, Nandini; Srikantaswamy, Mallikarjunaswamy
International Journal of Electrical and Computer Engineering (IJECE) Vol 14, No 1: February 2024
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/ijece.v14i1.pp305-314

Abstract

The deadlock-free and live lock-free routing at the same time is minimized in the network on chip (NoC) using the proposed adoptive reconfigurable routing protocol (ARRP). Congestion condition emergencies are avoided using the proposed algorithm. The input packet distribution process is improved among all its shortest paths of output points. The performance analysis has been initiated by considering different configuration (N*N) mesh networks, by sending various ranges of data packets to the network on chip. The average and maximum power dissipation of XY, odd-even, Dy-XY algorithm, and proposed algorithm are determined. In this paper, an analysis of gate utilization during data packet transfer in various mesh configurations is carried out. The number of cycles required for each message injection in different mesh configurations is analyzed. The proposed routing algorithm is implemented and compared with conventional algorithms. The simulation has been carried out using reconfigurable two-dimensional mesh for the NoC. The proposed algorithm has been implemented considering array size, the routing operating frequency, link width length, value of probability, and traffic types. The proposed ARRP algorithm reduces the average latency, avoids routing congestion, and is more feasible for NoC compared to conventional methods.
Optimizing real-time data preprocessing in IoT-based fog computing using machine learning algorithms Gowda Puttaswamy, Nandini; Narasimha Murthy, Anitha
IAES International Journal of Artificial Intelligence (IJ-AI) Vol 14, No 3: June 2025
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/ijai.v14.i3.pp1900-1909

Abstract

In the era of the internet of things (IoT), managing the massive influx of data with minimal latency is crucial, particularly within fog computing environments that process data close to its origin. Traditional methods have been inadequate, struggling with the high variability and volume of IoT data, which often leads to processing inefficiencies and poor resource allocation. To address these challenges, this paper introduces a novel machine learning-driven approach named real-time data preprocessing in IoT-based fog computing using machine learning algorithms (IoT-FCML). This method dynamically adapts to the changing characteristics of data and system demands. The implementation of IoT-FCML has led to significant performance enhancements: it reduces latency by approximately 0.26%, increases throughput by up to 0.3%, improves resource efficiency by 0.20%, and decreases data privacy overhead by 0.64%. These improvements are achieved through the integration of smart algorithms that prioritize data privacy and efficient resource use, allowing the IoT-FCML method to surpass traditional preprocessing techniques. Collectively, the enhancements in processing speed, adaptability, and data security represent a substantial advancement in developing more responsive and efficient IoT-based fog computing infrastructures, marking a pivotal progression in the field.
Co-Authors Goravi Sukumar, Pavithra Krishnaiah, Modugu Nagaraju, Sharmila Narasimha Murthy, Anitha Satish, Pooja Srikantaswamy, Mallikarjunaswamy Velluri, Rekha