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Ezhilvannan, Parimalasundar
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Electrical & Electronics Engineering

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Enhancing power conversion efficiency in five-level multilevel inverters using reduced switch topology Ezhilvannan, Parimalasundar; Ramasamy, Dharmaprakash; Subramanian, Sendil Kumar; Krishnan, Suresh
Bulletin of Electrical Engineering and Informatics Vol 13, No 3: June 2024
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/eei.v13i3.6884

Abstract

This paper presents extensive research on improving the power conversion efficiency of five-level multilevel inverters (MLIs) by utilizing a reduced switch topology. MLIs have received an abundance of focus because of their ability to generate high-quality output waveforms and have better harmonic outcomes than traditional two-level inverters. The high number of switches in MLIs, on the other hand, can result in increased power losses and lower overall efficiency. In this paper, a novel reduced switch topology for five-level MLIs, which is having five switches is proposed with the aim of minimizing power losses while preserving superior performance due to lesser number of switches. To achieve efficient power conversion, the proposed topology employs advanced pulse width modulation control strategies and optimized switching patterns. The simulation results show that the minimized switch topology improves the power conversion efficiency of the five-level MLI, resulting in lower losses and better overall system performance. The total harmonic distortion (THD) value of the output current has been reduced to 7.12% and the efficiency has been achieved to 96.92%. The findings of this investigation help to advance MLI technology, allowing for more efficient and reliable power conversion in a variety of applications such as renewable energy systems, electric vehicles, and industrial drives.
A novel switched-capacitor multilevel inverter for efficient voltage level generation Ezhilvannan, Parimalasundar; Venkata Padmavathi, Annam; Hani, Ummi; Panchkumar Dhote, Vyanktesh; Hemanth Kumar, Busireddy; Ramnarayan Singh, Arvind
Bulletin of Electrical Engineering and Informatics Vol 14, No 3: June 2025
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/eei.v14i3.9208

Abstract

This paper presents a novel single direct current (DC) source with switched-capacitor multilevel inverter (MLI) architecture capable of achieving seven output voltage levels using only eight switches, one diode, and two capacitors. The proposed topology (P) is compared with recent MLI configurations to assess its efficiency and performance. MATLAB/Simulink tools are utilized for simulation studies, and experimental validation is conducted to corroborate the theoretical findings. The investigation explores the impact of modulation index and switching frequency variations on the P output characteristics. Results indicate that the proposed MLI topology offers significant advantages in terms of component count reduction and simplicity while maintaining competitive performance compared to state-of-the-art alternatives. Additionally, the study provides insights into the influence of modulation index and switching frequency changes on the output voltage waveform, highlighting the adaptability and robustness of the P under varying operating conditions. This research contributes to the advancement of MLI designs by offering a streamlined and efficient solution suitable for various power electronic applications, including renewable energy systems and motor drives, where minimizing component count and complexity are crucial design considerations.
Co-Authors Hani, Ummi Hemanth Kumar, Busireddy Krishnan, Suresh Panchkumar Dhote, Vyanktesh Ramasamy, Dharmaprakash Ramnarayan Singh, Arvind Subramanian, Sendil Kumar Venkata Padmavathi, Annam