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Performance analysis of fifteen level reduced device count asymmetrical multilevel inverter Manivel, Murugesan; Palani, Lakshmanan; Subramani, Sivaranjani; Thiagarajan, Bharani Prakash; Kannusamy, Divya; Devasahayam, Jebakumar Immanuel; Vijayalakshmi, V. J.
International Journal of Power Electronics and Drive Systems (IJPEDS) Vol 15, No 4: December 2024
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/ijpeds.v15.i4.pp2243-2252

Abstract

In this article, a fifteen-level reduced device count asymmetrical multilevel inverter is introduced for electric vehicle applications. This novel multilevel inverter topology minimizes the power switches required. Control of the proposed inverter is accomplished via the nearest-level control method. In a typical multilevel inverter, ten to twelve switches are used to create the fifteen levels. A high number of switches are used in traditional multilevel inverters, which increases the distortion from all harmonics, switching losses, cost, and cost per switch. Only nine switches are needed for the suggested architecture. It significantly minimizes the total harmonic distortion by 5% and lowers the switching losses, low-order harmonics, and complexity. The efficiency of the suggested multilevel inverter (MLI) is 98.35%.