International Journal of Power Electronics and Drive Systems (IJPEDS)
Vol 15, No 4: December 2024

Performance analysis of fifteen level reduced device count asymmetrical multilevel inverter

Manivel, Murugesan (Unknown)
Palani, Lakshmanan (Unknown)
Subramani, Sivaranjani (Unknown)
Thiagarajan, Bharani Prakash (Unknown)
Kannusamy, Divya (Unknown)
Devasahayam, Jebakumar Immanuel (Unknown)
Vijayalakshmi, V. J. (Unknown)



Article Info

Publish Date
01 Dec 2024

Abstract

In this article, a fifteen-level reduced device count asymmetrical multilevel inverter is introduced for electric vehicle applications. This novel multilevel inverter topology minimizes the power switches required. Control of the proposed inverter is accomplished via the nearest-level control method. In a typical multilevel inverter, ten to twelve switches are used to create the fifteen levels. A high number of switches are used in traditional multilevel inverters, which increases the distortion from all harmonics, switching losses, cost, and cost per switch. Only nine switches are needed for the suggested architecture. It significantly minimizes the total harmonic distortion by 5% and lowers the switching losses, low-order harmonics, and complexity. The efficiency of the suggested multilevel inverter (MLI) is 98.35%.

Copyrights © 2024






Journal Info

Abbrev

IJPEDS

Publisher

Subject

Control & Systems Engineering Electrical & Electronics Engineering

Description

International Journal of Power Electronics and Drive Systems (IJPEDS, ISSN: 2088-8694, a SCOPUS indexed Journal) is the official publication of the Institute of Advanced Engineering and Science (IAES). The scope of the journal includes all issues in the field of Power Electronics and drive systems. ...