Shivaraj, Mamatha Aruvanalli
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Design of medium grain integrated clock gater for low power clock network Nagaraja, Shylashree; Sathisha, Abhinav; Shivaraj, Mamatha Aruvanalli; Nanjundappa, Latha Bavikatte; Pandeshwara, Prakash Tunga
International Journal of Reconfigurable and Embedded Systems (IJRES) Vol 14, No 1: March 2025
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/ijres.v14.i1.pp117-125

Abstract

The very large scale integration (VLSI) applications were mainly dependent on area, reliability, and cost rather than power. The power-increasing demand was mainly due to the latest growth of electronic products such as portable mobile phones, laptops, and other devices that needs high speed and low power consumption. The power analysis provides insights on the switching activity of various sequential logic and thus would help early power optimization approaches to be incorporated in the design flow. The medium grain integrated clock gater insertion will help with synthesis flows for other low-power techniques to be applied. The power analysis is performed with a physically driven synthesis network for both leakage and dynamic. The power analysis revealed that medium grain clock gaters help with finer granularity of the clock gating principle thus improving gating efficiency. The medium grain clock gating techniques help the tool understand the activities of various sinks thus helping in the insertion of fine gaters as well. For a single medium grain clock gater, the power savings obtained were 41.37% and 79.35% without and with fine gater insertion respectively while cloning of the medium gaters resulted in 45.1% and 67.4% power savings without and with fine gater insertion respectively. The fine-grain integrated clock gating insertion incurred a maximum of 14.7% increased gate count.
Survey on 3D biometric traits for human identification Gangachannaiah, Divya; Shivaraj, Mamatha Aruvanalli; Nagaraj, Honganur Chandrasekharaiah; Paga, Prasanna Gururaj
IAES International Journal of Artificial Intelligence (IJ-AI) Vol 14, No 4: August 2025
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/ijai.v14.i4.pp3143-3152

Abstract

Individuals are verified and identified using Biometric technology based on their biological or behavioral traits. Biometric-based personal authentication systems are more reliable and user friendly, overruns the traditional personal authentication systems. The physiological biometric traits get abraded due to aging and massive work, while the behavioral biometric traits are having high variations due to external factors such as fatigue, and mood. Among the physiological biometric traits, Finger geometry patterns are widely deployed authentication system reason being its stability, user acceptability and uniqueness. Recent trends in Biometrics attempt to incorporate 3D domain traits, 3D reconstruction is done using 2D multiple images. 3D images are usually more robust and illumination invariant as compared to their 2D counterparts. 3D reconstruction algorithms are compared by finding mean square error (MSE).
Robust 3D finger knuckles biometric identification with hierarchical featureNet architecture Gangachannaiah, Divya; Shivaraj, Mamatha Aruvanalli; Nagaraj, Honganur Chandrasekharaiah
IAES International Journal of Artificial Intelligence (IJ-AI) Vol 14, No 5: October 2025
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/ijai.v14.i5.pp4181-4191

Abstract

A novel biometric identifier known as the 3D finger knuckle pattern provides highly discriminative characteristics for the finger knuckle-based personal identification. This paper addresses the challenge of 3D finger knuckle recognition, aiming to enhance precision and overcome limitations in existing approaches. Leveraging neural network technology, it introduces a novel neural network framework for this purpose. Recent research has made significant progress in 3D finger knuckle recognition, particularly in the areas of matching schemes, feature representations, and specialized deep neural networks. Challenges such as limited training data and dataset heterogeneity are discussed. The proposed 3D hierarchical featureNet (HFN) methodology involves a multi-stage pre-processing process for 3D images, encompassing detection, cropping, smoothing, and hole-filling. Feature similarity is evaluated with nearest neighbor distance ratios, enabling precise recognition. The key contribution of this work is the introduction of a new feature vector that incorporates curvature data, improving the state-of-the-art. The methodology employs statistical distribution analysis for feature similarity and 3D geometry for accurate curvature representation. Overall, this research offers a comprehensive solution for 3D finger knuckle recognition, enhancing accuracy and efficiency through innovative pre-processing, feature extraction, and similarity evaluation methods.