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Hybrid MPPT technique using fuzzy logic and P&O of solar power system Et-Torabi, Karima; Barakat, Souhail; N’hili, Badr; Mesbahi, Abdelouahed; Nouaiti, Ayoub
International Journal of Power Electronics and Drive Systems (IJPEDS) Vol 16, No 2: June 2025
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/ijpeds.v16.i2.pp1061-1069

Abstract

This paper introduces an enhanced perturb and observe (P&O) technique with a variable step size utilizing fuzzy logic to address the limitations of the traditional P&O technique, particularly under rapidly fluctuating solar radiation conditions. The performance of the suggested variable step size FLC-P&O maximum power point tracking (MPPT) and the constant step size P&O techniques is simulated and evaluated under various operating scenarios using MATLAB/Simulink software. The suggested technique was successfully validated using a boost converter connected to a Canadian Solar CS6P-240P photovoltaic (PV) model. The results demonstrate that the FLC P&O technique improves response accuracy and reduces steady-state terminal voltage fluctuations. Moreover, the findings show that the suggested technique provides a faster response and higher MPPT efficiency compared to the traditional P&O technique, particularly during sudden variations in solar irradiance.
Evaluating shading effects on photovoltaic modules: Mathematical modeling with ideal, single, and double diodes Abouyaakoub, Mohcine; Chahboun, Mbarek; Ali, Ali Ait; Mrabet, Aziz El; Hihi, Hicham; Barakat, Souhail
International Journal of Power Electronics and Drive Systems (IJPEDS) Vol 16, No 3: September 2025
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/ijpeds.v16.i3.pp1949-1961

Abstract

Among the issues that solar systems face is partial shadowing that can be caused by many factors, such as trees, buildings, or clouds. A shaded module will produce less energy, which reduces the power supplied by a solar system based on PV panels. The purpose of this study is to model and simulate photovoltaic modules based on an ideal single and double diode. After that, we will simulate five configurations formed by nine photovoltaic solar panels: series (S), parallel (P), series-parallel (SP), bridge-link (BL), and total-cross-tied (TCT) under uniform and non-uniform cases (center, diagonal, and frame). These five PV solar configurations are compared in terms of short circuit currents (ISC), open circuit voltages (VOC), peak powers (PMP), the voltage and current values corresponding to maximum power (VMP, IMP), mismatch power loss (MPL), fill factor (FF), efficiency ratio (ER), and overall maximum power (OMP). The six PV configurations are simulated, considering the parameters of the STM6-40/36 PV module.
Processor-in-the-loop performance validation of a three-phase NPC three-level inverter using a novel sinusoidal PWM technique for scalar control of an induction motor N’hili, Badr; Barakat, Souhail; Mesbahi, Abdelouahed; Khafallah, Mohamed; Nouaiti, Ayoub
International Journal of Power Electronics and Drive Systems (IJPEDS) Vol 16, No 4: December 2025
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/ijpeds.v16.i4.pp2257-2270

Abstract

This paper presents the performance of a three-phase, three-level neutral point clamped inverter driving an induction motor for variable-speed applications, compared to a two-level inverter. The studied inverter operates using a novel sinusoidal pulse width modulation technique that improves the quality of voltage and current output signals while increasing efficiency. Motor speed control is achieved using the scalar control (V/Hz) method. Experimental validation of the simulation results is performed by executing the generated C code on the F28379D DSP LaunchPad within the MATLAB/Simulink and Code Composer Studio environment, applying the processor-in-the-loop (PIL) technique.