International Journal of Power Electronics and Drive Systems (IJPEDS)
Vol 16, No 4: December 2025

Processor-in-the-loop performance validation of a three-phase NPC three-level inverter using a novel sinusoidal PWM technique for scalar control of an induction motor

N’hili, Badr (Unknown)
Barakat, Souhail (Unknown)
Mesbahi, Abdelouahed (Unknown)
Khafallah, Mohamed (Unknown)
Nouaiti, Ayoub (Unknown)



Article Info

Publish Date
01 Dec 2025

Abstract

This paper presents the performance of a three-phase, three-level neutral point clamped inverter driving an induction motor for variable-speed applications, compared to a two-level inverter. The studied inverter operates using a novel sinusoidal pulse width modulation technique that improves the quality of voltage and current output signals while increasing efficiency. Motor speed control is achieved using the scalar control (V/Hz) method. Experimental validation of the simulation results is performed by executing the generated C code on the F28379D DSP LaunchPad within the MATLAB/Simulink and Code Composer Studio environment, applying the processor-in-the-loop (PIL) technique.

Copyrights © 2025






Journal Info

Abbrev

IJPEDS

Publisher

Subject

Control & Systems Engineering Electrical & Electronics Engineering

Description

International Journal of Power Electronics and Drive Systems (IJPEDS, ISSN: 2088-8694, a SCOPUS indexed Journal) is the official publication of the Institute of Advanced Engineering and Science (IAES). The scope of the journal includes all issues in the field of Power Electronics and drive systems. ...