International Journal of Reconfigurable and Embedded Systems (IJRES)
Vol 9, No 1: March 2020

A compact model of transconductance and drain conductance for DMG-GC-DOT cylindrical gate MOSFET

Hind Jaafar (University Sultan Moulay Slimane - Faculty of Science and Technology)
Abdellah Aouaj (University Sultan Moulay Slimane - Faculty of Science and Technology)
Benjamin IƱiguez (Universitat Rovira i Virgili)
Ahmed Bouziane (University Sultan Moulay Slimane - Faculty of Science and Technology)



Article Info

Publish Date
01 Mar 2020

Abstract

A compact model for dual-material gate graded-channel and dual-oxide thickness with two dielectric constant different cylindrical gate (DMG-GC-DOTTDCD) MOSFET was investigated in terms of transconductance, drain conductance and capacitance. Short channel effects are modeled with simple expressions, and incorporated into the core of the model (at the drain current). The design effectiveness of DMG-GC-DOTTDCD was monitored in comparing with the DMG-GC-DOT transistor, the effect of variations of technology parameters, was presented in terms of gate polarization and drain polarization. The results indicate that the DMG-GC-DOTTDCD devices have characteristics higher than the DMG-GC-DOT MOSFET. To validate the proposed model, we used the results obtained from the simulation of the device with the SILVACO-ATLAS-TCAD software.

Copyrights © 2020






Journal Info

Abbrev

IJRES

Publisher

Subject

Economics, Econometrics & Finance

Description

The centre of gravity of the computer industry is now moving from personal computing into embedded computing with the advent of VLSI system level integration and reconfigurable core in system-on-chip (SoC). Reconfigurable and Embedded systems are increasingly becoming a key technological component ...