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All Journal International Journal of Reconfigurable and Embedded Systems (IJRES)
Hind Jaafar
University Sultan Moulay Slimane - Faculty of Science and Technology
Economics, Econometrics & Finance

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A compact model of transconductance and drain conductance for DMG-GC-DOT cylindrical gate MOSFET Hind Jaafar; Abdellah Aouaj; Benjamin Iñiguez; Ahmed Bouziane
International Journal of Reconfigurable and Embedded Systems (IJRES) Vol 9, No 1: March 2020
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (432.238 KB) | DOI: 10.11591/ijres.v9.i1.pp34-41

Abstract

A compact model for dual-material gate graded-channel and dual-oxide thickness with two dielectric constant different cylindrical gate (DMG-GC-DOTTDCD) MOSFET was investigated in terms of transconductance, drain conductance and capacitance. Short channel effects are modeled with simple expressions, and incorporated into the core of the model (at the drain current). The design effectiveness of DMG-GC-DOTTDCD was monitored in comparing with the DMG-GC-DOT transistor, the effect of variations of technology parameters, was presented in terms of gate polarization and drain polarization. The results indicate that the DMG-GC-DOTTDCD devices have characteristics higher than the DMG-GC-DOT MOSFET. To validate the proposed model, we used the results obtained from the simulation of the device with the SILVACO-ATLAS-TCAD software.
Co-Authors Abdellah Aouaj Ahmed Bouziane Benjamin Iñiguez