International Journal of Reconfigurable and Embedded Systems (IJRES)
Vol 5, No 1: March 2016

Design and Analysis of CMOS and Adiabatic 1:16 Multiplexer and 16:1 Demultiplexer

K. Anitha (Arunai Engineering College)
R. Jayachira (Arunai Engineering College)



Article Info

Publish Date
01 Mar 2016

Abstract

Conventional CMOS is compared with two adiabatic logic styles namely Efficient Charge Recovery Logic (ECRL) and Improved Efficient Charge Recovery Logic (IECCRL). A 16:1 multiplexer and 1:16 demultiplexer using these design techniques are designed and results are compared based on their minimum/maximum power consumption and transistor count. The proposed schematics multiplexer and demultiplexer are simulated using Microwind2 and DSCH2 software.

Copyrights © 2016






Journal Info

Abbrev

IJRES

Publisher

Subject

Economics, Econometrics & Finance

Description

The centre of gravity of the computer industry is now moving from personal computing into embedded computing with the advent of VLSI system level integration and reconfigurable core in system-on-chip (SoC). Reconfigurable and Embedded systems are increasingly becoming a key technological component ...