Indonesian Journal of Electrical Engineering and Computer Science
Vol 23, No 3: September 2021

Less memory and high accuracy logarithmic number system architecture for arithmetic operations

Siti Zarina Md Naziri (Universiti Malaysia Perlis)
Rizalafande Che Ismail (Universiti Malaysia Perlis)
Mohd Nazrin Md Isa (Universiti Malaysia Perlis)
Razaidi Hussin (Universiti Malaysia Perlis)



Article Info

Publish Date
01 Sep 2021

Abstract

Interpolation is another important procedure for logarithmic number system (LNS) addition and subtraction. As a medium of approximation, the interpolation procedure has an urgent need to be enhanced to increase the accuracy of the operation results. Previously, most of the interpolation procedures utilized the first degree interpolators with special error correction procedure which aim to eliminate additional embedded multiplications. However, the interpolation procedure for this research was elevated up to a second degree interpolation. Proper design process, investigation, and analysis were done for these interpolation configurations in positive region by standardizing the same co-transformation procedure, which is the extended range, second order co-transformation. Newton divided differences turned out to be the best interpolator for second degree implementation of LNS addition and subtraction, with the best-achieved BTFP rate of +0.4514 and reduction of memory consumption compared to the same arithmetic used in european logarithmic microprocessor (ELM) up to 51%.

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