<![CDATA[Daily usage of devices has had a major influence on lives and existence, which would be unimaginable without them. Due to this, recent gadget dependability concerns need particular attention. PCs, hand mobile phones, and other computerized household gadgets need integrated circuits (ICs). Individual components must work together to accomplish their tasks and make the circuit operate. Hot carrier effect, oxide breakdown, and other system-level problems result from accommodating several devices in a planar IC. Vertical linking active components in one IC to another IC is a common method of three-dimensional IC integration (3D-IC). The main issue with 3D-IC adoption is electrical interference to neighboring through silicon via (TSV) and active transistors, which substantially reduces system performance. The electrical TSV (ETSV) model, which employs solely electrical signal carrying TSV, and the thermal TSV (TTSV) model, which incorporates thermal TSV during simulation, are used in this research to reduce electrical interference. The electrical signal transporting TSV to the substrate and other TSV was investigated for interference. With other models, this study also shows higher frequency regimes up to 1 THz. We found that the suggested methodology improves 3D-IC development by more than 30% by reducing electrical interference from signal-carrying TSV to other TSV.]]>
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