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International Journal of Electrical and Computer Engineering

IJECE
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Published by Institute of Advanced Engineering and Science

ISSN : 20888708 EISSN : 27222578 DOI : -

Core Subject : Science, Engineering,

Computer Science & IT Electrical & Electronics Engineering

International Journal of Electrical and Computer Engineering (IJECE, ISSN: 2088-8708, a SCOPUS indexed Journal, SNIP: 1.001; SJR: 0.296; CiteScore: 0.99; SJR & CiteScore Q2 on both of the Electrical & Electronics Engineering, and Computer Science) is the official publication of the Institute of Advanced Engineering and Science (IAES). The journal is open to submission from scholars and experts in the wide areas of electrical, electronics, instrumentation, control, telecommunication and computer engineering from the global world.

Arjuna Subject : Ilmu Komputer (semua kategori) - Ilmu Komputer (Lain-Lain)

Articles 112 Documents

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Search results for , issue "Vol 10, No 1: February 2020" : 112 Documents clear

Optimal packet routing for wireless body area network using software defined network to handle medical emergency B. Manickavasagam; B. Amutha; S. Priyanka
International Journal of Electrical and Computer Engineering (IJECE) Vol 10, No 1: February 2020
Publisher : Institute of Advanced Engineering and Science

The packet forwarding node selection is one of the main constraints in the Software Defined Network (SDN). To improve the network performance, the SDN controller has to choose the shortest and optimised path between source and destination in routine and emergency packet transmission. In e-health service, information of the emergency patient has to be transferred immediately to remote hospitals or doctors by using efficient packet routing approach in Wireless Body Area Network (WBAN). In WBAN, to improve the packet transmission, the optimal packet routing policy developed based on packets priority with the support of a greedy algorithm for SDN. The SDN Controller selects the forwarding node based on node propagation delay and available bandwidth between two forwarding nodes. The mesh network topology network created for implementation, implementation results are compared with existing research works. Finally, this algorithm implemented in our institution, Software defined communication testbed laboratory (SDCTestbed Lab) with the support of 13 Zodiac-Fx (Forwarding device), 2 Raspberry-Pi3 B+ Model (host) and Arduino kit (sensor node).

The upsurge of deep learning for computer vision applications Priyanka Patel; Amit Thakkar
International Journal of Electrical and Computer Engineering (IJECE) Vol 10, No 1: February 2020
Publisher : Institute of Advanced Engineering and Science

Artificial intelligence (AI) is additionally serving to a brand new breed of corporations disrupt industries from restorative examination to horticulture. Computers can’t nevertheless replace humans, however, they will work superbly taking care of the everyday tangle of our lives. The era is reconstructing big business and has been on the rise in recent years which has grounded with the success of deep learning (DL). Cyber-security, Auto and health industry are three industries innovating with AI and DL technologies and also Banking, retail, finance, robotics, manufacturing. The healthcare industry is one of the earliest adopters of AI and DL. DL accomplishing exceptional dimensions levels of accurateness to the point where DL algorithms can outperform humans at classifying videos & images. The major drivers that caused the breakthrough of deep neural networks are the provision of giant amounts of coaching information, powerful machine infrastructure, and advances in academia. DL is heavily employed in each academe to review intelligence and within the trade-in building intelligent systems to help humans in varied tasks. Thereby DL systems begin to crush not solely classical ways, but additionally, human benchmarks in numerous tasks like image classification, action detection, natural language processing, signal process, and linguistic communication process.

BLDC motor driven electric skateboard using SVPWM R. Palanisamy; Th. Ankit Singh; Anamika Ranjan; Jatin Singh
International Journal of Electrical and Computer Engineering (IJECE) Vol 10, No 1: February 2020
Publisher : Institute of Advanced Engineering and Science

Several problems are faced by today’s generation. One of them is the increase in pollution in our everyday life. Each of us can play a part in reducing this by using some environmentally friendly method such as cycles which requires mechanical force. Another way to accomplish this is by using electricity to produce this mechanical force i.e. electric motor. In this paper BLDC motor driven electric skateboard is designed with mathematical calculation, verified with simulation and developed as a experimental setup.

Mobile robot controller using novel hybrid system Ayman A Abu Baker; Yazeed Ghadi
International Journal of Electrical and Computer Engineering (IJECE) Vol 10, No 1: February 2020
Publisher : Institute of Advanced Engineering and Science

Hybrid neuro-fuzzy controller is one of the techniques that is used as a tool to control a mobile robot in unstructured environment. In this paper a novel neuro-fuzzy technique is proposed in order to tackle the problem of mobile robot autonomous navigation in unstructured environment. Obstacle avoidance is an important task in the field of robotics, since the goal of autonomous robot is to reach the destination without collision. The objective is to make the robot move along a collision free trajectory until it reaches its target. The proposed approach uses the artificial neural network instead of the fuzzified engine then the output from it is processed using adaptive inference engine and defuzzification engine. In this approach, the real processing time is reduce that is increase the mobile robot response. The proposed neuro-fuzzy controller is evaluated subjectively and objectively with other approaches and also the processing time is taken in consideration.

Low complexity DCO-FBMC visible light communication system Abdullah A. Qasim; M. F. L. Abdullah; Rahmat Bin Talib; Mohammed N. Nemah; Ahmed T. Hammoodi
International Journal of Electrical and Computer Engineering (IJECE) Vol 10, No 1: February 2020
Publisher : Institute of Advanced Engineering and Science

Filter Bank Multicarrier (FBMC) is a new waveform candidate in the visible light communication system (VLC). FBMC is a distinctive kind of multi-carrier modulation that can be regarded as an alternative to orthogonal frequency Division Multicarrier (OFDM) with CP (cyclic prefix). DCO-FBMC (DC-bias optical FBMC) has recently been used in VLC, because it overcomes all defects in the optical-OFDM system and has high spectral efficiency. but at the same time the traditional DCO-FBMC suffers from high complexity due to the use of Hermitian Symmetry for real signal, by using 2N-point subcarrier IFFT (Inverse Fast Fourier Transformer) in the modulator, and the output is N-point subcarrier FFT (Fast Fourier Transform) in the demodulator. In this paper, for the first time, the possibility of minimizing complexity and generating a real signal without the use of Hermitian Symmetry or any other technique has been verified. The proposed technology provides 50% of the size of the IFFT / FFT and this results in a significant reduction in power consumption and occupied chip area.

Performance analysis of transformation and Bogdonov chaotic substitution based image cryptosystem Prajwalasimha S. N.; Basavaraj L
International Journal of Electrical and Computer Engineering (IJECE) Vol 10, No 1: February 2020
Publisher : Institute of Advanced Engineering and Science

In this article, a combined Pseudo Hadamard transformation and modified Bogdonav chaotic generator based image encryption technique is proposed. Pixel position transformation is performed using Pseudo Hadamard transformation and pixel value variation is made using Bogdonav chaotic substitution. Bogdonav chaotic generator produces random sequences and it is observed that very less correlation between the adjacent elements in the sequence. The cipher image obtained from the transformation stage is subjected for substitution using Bogdonav chaotic sequence to break correlation between adjacent pixels. The cipher image is subjected for various security tests under noisy conditions and very high degree of similarity is observed after deciphering process between original and decrypted images.

Color image steganography in YCbCr space Zena Ahmed Alwan; Hamid Mohammed Farhan; Siraj Qays Mahdi
International Journal of Electrical and Computer Engineering (IJECE) Vol 10, No 1: February 2020
Publisher : Institute of Advanced Engineering and Science

Steganography is a best method for in secret communicating information during the transference of data. Images are an appropriate method that used in steganography can be used to protection the simple bits and pieces. Several systems, this one as color scale images steganography and grayscale images steganography, are used on color and store data in different techniques. These color images can have very big amounts of secret data, by using three main color modules. The different color modules, such as HSV-(hue, saturation, and value), RGB-(red, green, and blue), YCbCr-(luminance and chrominance), YUV, YIQ, etc. This paper uses unusual module to hide data: an adaptive procedure that can increase security ranks when hiding a top secret binary image in a RGB color image, which we implement the steganography in the YCbCr module space. We performed Exclusive-OR (XOR) procedures between the binary image and the RGB color image in the YCBCR module space. The converted byte stored in the 8-bit LSB is not the actual bytes; relatively, it is obtained by translation to another module space and applies the XOR procedure. This technique is practical to different groups of images. Moreover, we see that the adaptive technique ensures good results as the peak signal to noise ratio (PSNR) and stands for mean square error (MSE) are good. When the technique is compared with our previous works and other existing techniques, it is shown to be the best in both error and message capability. This technique is easy to model and simple to use and provides perfect security with unauthorized.

A Genetic algorithm for the optimal design of a multistage amplifier Asmae El Beqal; Bachir Benhala; Izeddine Zorkani
International Journal of Electrical and Computer Engineering (IJECE) Vol 10, No 1: February 2020
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/ijece.v10i1.pp129-138

The optimal sizing of analog circuits is one of the most complicated processes, because of the number of variables taken into, to the number of required objectives to be optimized and to the constraint functions restrictions. The aim is to automate this activity in order to accelerate the circuits design and sizing. In this paper, we deal with the optimization of the three stage bipolar transistor amplifier performances namely the voltage gain (AV), the input impedance (ZIN), the output impedance (ZOUT), the power consumption (P) and the low and the high cutoff frequency (FL,FH), through the Genetic Algorithm (GA). The presented optimization problem is of multi-dimensional parameters, and the trade-off of all parameters. In fact, the passive components (Resistors and Capacitors) are selected from manufactured constant values (E12, E24, E48, E96, E192) for the purpose of reduce the cost of design; also, the intrinsic parameters of transistors (hybrid parameters and the junction capacitances) are considered variables in order not to be limited in design. SPICE simulation is used to validate the obtained result/performances.

Stepper motor movement design based on FPGA Freddy Artadima Silaban; Setiyo Budiyanto; Wahyu Kusuma Raharja
International Journal of Electrical and Computer Engineering (IJECE) Vol 10, No 1: February 2020
Publisher : Institute of Advanced Engineering and Science

A stepper motor is an electro mechanical device that can convert electrical pulses to the axis of movement. The finding problem in the movement of a stepper motor is cannot respond to the clock signal directly because the motor windings require a clock (sequence) in the correct order. If the control signal given is not correct, the motor is not moving according to the specified precision. To answer these problems, it is necessary to move the stepper motor with a clock signal that works in real time. The research method is done by designing and testing the stepper motor movement in full stepp and half step with the direction of Clock Wise (CW) and Counter Clock Wise (CCW) movement. These are simulated by using FPGA Isim and implementation using a stepper motor. The results of several experiments have been carried out the stepper motor movement degree according to the input value entered,responding timely movement, and the direction of movement stepper motor.

Proactive cloud service assurance framework for fault remediation in cloud environment Jyoti Shetty; Sathish Babu B.; Shobha G.
International Journal of Electrical and Computer Engineering (IJECE) Vol 10, No 1: February 2020
Publisher : Institute of Advanced Engineering and Science

Cloud resiliency is an important issue in successful implementation of cloud computing systems. Handling cloud faults proactively, with a suitable remediation technique having minimum cost is an important requirement for a fault management system. The selection of best applicable remediation technique is a decision making problem and considers parameters such as i) Impact of remediation technique ii) Overhead of remediation technique ii) Severity of fault and iv) Priority of the application. This manuscript proposes an analytical model to measure the effectiveness of a remediation technique for various categories of faults, further it demonstrates the implementation of an efficient fault remediation system using a rule-based expert system. The expert system is designed to compute an utility value for each remediation technique in a novel way and select the best remediation technique from its knowledgebase. A prototype is developed for experimentation purpose and the results shows improved availability with less overhead as compared to a reactive fault management system.

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Tole Sutikno

Contact Email
ijece@iaesjournal.com

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Journal Mail Official
ijece@iaesjournal.com

Editorial Address
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Location
Kota yogyakarta,

Daerah istimewa yogyakarta

INDONESIA

Abstract

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Home Page

OAI Link

Editorial Team

Contact

Reviewer

Google Scholar

Contact Name Tole Sutikno

Contact Email ijece@iaesjournal.com

Phone -

Journal Mail Official ijece@iaesjournal.com

Editorial Address -

Location Kota yogyakarta, Daerah istimewa yogyakarta INDONESIA

Abstract

Abstract

Abstract

Abstract

Abstract

Abstract

Abstract

Abstract

Abstract

Abstract

Contact Name
Tole Sutikno

Contact Email
ijece@iaesjournal.com

Phone
-

Journal Mail Official
ijece@iaesjournal.com

Editorial Address
-

Location
Kota yogyakarta,

Daerah istimewa yogyakarta

INDONESIA