International Journal of Electrical and Computer Engineering
International Journal of Electrical and Computer Engineering (IJECE, ISSN: 2088-8708, a SCOPUS indexed Journal, SNIP: 1.001; SJR: 0.296; CiteScore: 0.99; SJR & CiteScore Q2 on both of the Electrical & Electronics Engineering, and Computer Science) is the official publication of the Institute of Advanced Engineering and Science (IAES). The journal is open to submission from scholars and experts in the wide areas of electrical, electronics, instrumentation, control, telecommunication and computer engineering from the global world.
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A Polynomial Digital Pre-Distortion Technique Based on Iterative Architecture
Kwang-Pyo Lee;
Soon-Il Hong;
Eui-Rim Jeong
International Journal of Electrical and Computer Engineering (IJECE) Vol 6, No 1: February 2016
Publisher : Institute of Advanced Engineering and Science
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DOI: 10.11591/ijece.v6i1.pp106-112
A digital predistortion (DPD) technique based on an iterative adaptation structure is proposed for linearizing power amplifiers (PAs). To obtain proper DPD parameters, a feedback path that converts the PA’s output to a baseband signal is required, and memory is also needed to store the baseband feedback signals. DPD parameters are usually found by an adaptive algorithm by using the transmitted signals and the corresponding feedback signals. However, for the adaptive algorithm to converge to a reliable solution, long feedback samples are required, which increases hardware complexity and cost. Considering that the convergence time of the adaptive algorithm highly depends on the initial condition, we propose a DPD technique that requires relatively shorter feedback samples. Specifically, the proposed DPD iteratively utilizes the short feedback samples in memory while keeping and using the DPD parameters found at the former iteration as the initial condition at the next iteration. Computer simulation shows that the proposed technique performs better than the conventional technique, as the former requires much shorter feedback memory than the latter.
Modelling and Design of Inverter Threshold Quantization based Current Comparator using Artificial Neural Networks
Veepsa Bhatia;
Neeta Pandey;
Asok Bhattacharyya
International Journal of Electrical and Computer Engineering (IJECE) Vol 6, No 1: February 2016
Publisher : Institute of Advanced Engineering and Science
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DOI: 10.11591/ijece.v6i1.pp320-329
Performance of a MOS based circuit is highly influenced by the transistor dimensions chosen for that circuit. Thus, proper dimensioning of the transistors plays a key role in determining its overall performance. While choosing the dimension is critical, it is equally difficult, primarily due to complex mathematical formulations that come into play when moving into the submicron level. The drain current is the most affected parameter which in turn affects all other parameters. Thus, there is a constant quest to come up with techniques and procedure to simplify the dimensioning process while still keeping the parameters under check. This study presents one such novel technique to estimate the transistor dimensions for a current comparator structure, using the artificial neural networks approach. The approach uses Multilayer perceptrons as the artificial neural network architectures. The technique involves a two step process. In the first step, training and test data are obtained by doing SPICE simulations of modelled circuit using 0.18μm TSMC CMOS technology parameters. In the second step, this training and test data is applied to the developed neural network architecture using MATLAB R2007b.
New Algorithm for Fast Processing RFID System in Container Terminal
Evizal Abdul Kadir;
Siti Mariyam Shamsuddin;
Detri Karya;
Sri Listia Rosa
International Journal of Electrical and Computer Engineering (IJECE) Vol 6, No 1: February 2016
Publisher : Institute of Advanced Engineering and Science
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DOI: 10.11591/ijece.v6i1.pp283-291
The growth of world economic and increasing of trading in most of countries has impact to the number of containers export and import between countries. Some of container terminal is very busy to handle high volume of container movement. Conventional operational procedures have difficulties to handle containers movement then make slow and some issues in terminal operation for container clearance. This paper discus on proposing new algorithm to the current container terminal management system used RFID technology for fast processing and clearance. Container Terminal Management System (CTMS) is a system for port management and interface to the RFID system that used to identify container e-seal, truck and driver identity. Lack of communication and interfacing protocol made slow response during request or reply of message to the gate operator. Proposed algorithm with new procedure of request to CTMS made faster response and avoid inaccuracy of detecting container e-seal. Results of implementation new algorithm have improved to the productivity and efficiency of container terminal. Testing and implementation of this proposed system conducted in a private container terminal in Malaysia.
Modified Variational Mode Decomposition for Power Line Interference Removal in ECG Signals
Neethu Mohan;
Sachin Kumar S;
Prabaharan Poornachandran;
Soman K.P
International Journal of Electrical and Computer Engineering (IJECE) Vol 6, No 1: February 2016
Publisher : Institute of Advanced Engineering and Science
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DOI: 10.11591/ijece.v6i1.pp151-159
Power line interferences (PLI) occurring at 50/60 Hz can corrupt the biomedical recordings like ECG signals and which leads to an improper diagnosis of disease conditions. Proper interference cancellation techniques are therefore required for the removal of these power line disturbances from biomedical recordings. The non-linear time varying characteristics of biomedical signals make the interference removal a difficult task without compromising the actual signal characteristics. In this paper, a modified variational mode decomposition based approach is proposed for PLI removal from the ECG signals. In this approach, the central frequency of an intrinsic mode function is fixed corresponding to the normalized power line disturbance frequency. The experimental results show that the PLI interference is exactly captured both in magnitude and phase and are removed. The proposed approach is experimented with ECG signal records from MIT-BIH Arrhythmia database and compared with traditional notch filtering.
Electricity Peak Load Demand using De-noising Wavelet Transform integrated with Neural Network Methods
Pituk Bunnoon
International Journal of Electrical and Computer Engineering (IJECE) Vol 6, No 1: February 2016
Publisher : Institute of Advanced Engineering and Science
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DOI: 10.11591/ijece.v6i1.pp12-20
One of most important elements in electric power system planning is load forecasts. So, in this paper proposes the load demand forecasts using de-noising wavelet transform (DNWT) integrated with neural network (NN) methods. This research, the case study uses peak load demand of Thailand (Electricity Generating Authority of Thailand: EGAT). The data of demand will be analyzed with many influencing variables for selecting and classifying factors. In the research, the de-noising wavelet transform uses for decomposing the peak load signal into 2 components these are detail and trend components. The forecasting method using the neural network algorithm is used. The work results are shown a good performance of the model proposed. The result may be taken to the one of decision in the power systems operation.
Study of BGP Convergence Time
Rohit Nilkanth Devikar;
D. V. Patil;
V. Chandraprakash
International Journal of Electrical and Computer Engineering (IJECE) Vol 6, No 1: February 2016
Publisher : Institute of Advanced Engineering and Science
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DOI: 10.11591/ijece.v6i1.pp413-420
Border Gateway Protocol (BGP), a path vector routing protocol, is a widespread exterior gateway protocol (EGP) in the internet. Extensive deployment of the new technologies in internet, protocols need to have continuous improvements in its behavior and operations. New routing technologies conserve a top level of service availability. Hence, due to topological changes, BGP needs to achieve a fast network convergence. Now a days size of the network growing very rapidly. To maintain the high scalability in the network BGP needs to avoid instability. The instability and failures may cause the network into an unstable state, which significantly increases the network convergence time. This paper summarizes the various approaches like BGP policies, instability, and fault detection etc. to improve the convergence time of BGP.
Key Software Metrics and its Impact on each other for Software Development Projects
Mridul Bhardwaj;
Ajay Rana
International Journal of Electrical and Computer Engineering (IJECE) Vol 6, No 1: February 2016
Publisher : Institute of Advanced Engineering and Science
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DOI: 10.11591/ijece.v6i1.pp242-248
Every software development project is unique and different from repeatable manufacturing process. Each software project share different challenges related to technology, people and timelines. If every project is unique, how project manager can estimate project in a consistent way by applying his past experience. One of the major challenges faced by the project manager is to identify the key software metrics to control and monitor the project execution. Each software development project may be unique but share some common metric that can be used to control and monitor the project execution. These metrics are software size, effort, project duration and productivity. These metrics tells project manager about what to deliver (size), how it was delivered in past (productivity) and how long will it take to deliver with current team capability (time and effort). In this paper, we explain the relationship among these key metrics and how they statistically impact each other. These relationships have been derived based on the data published in book “Practical Software Estimation” by International Software Benchmarking Group. This paper also explains how these metrics can be used in predicting the total number of defects. Study suggests that out of the four key software metrics software size significantly impact the other three metrics (project effort, duration and productivity). Productivity does not significantly depend on the software size but it represents the nonlinear relationship with software size and maximum team size, hence, it is recommended not to have a very big team size as it might impact the overall productivity. Total project duration only depends on the software size and it does not depend on the maximum team size. It implies that we cannot reduce project duration by increasing the team size. This fact is contrary to the perception that we can reduce the project duration by increasing the project team size. We can conclude that software size is the important metrics and a significant effort must be put during project initiation phases to estimate the project size. As software size will help in estimating the project duration and project efforts so error in estimating the software size will have significant impact on the accuracy of project duration and effort. All these key metrics must be re-calibrated during the project development life cycle.
A Method for Attitude Control Based on a Mathematical Model for an Inverted Pendulum-Type Mobile Robot
Jin-Ho Yoon;
Myung-Jin Chung
International Journal of Electrical and Computer Engineering (IJECE) Vol 6, No 1: February 2016
Publisher : Institute of Advanced Engineering and Science
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DOI: 10.11591/ijece.v6i1.pp198-204
A method for attitude control based on a mathematical model for an inverted pendulum-type mobile robot was proposed. The inverted pendulum-type mobile robot was designed and the mathematical modeling was conducted. The parameters of the mobile robot were estimated and the state-space model of mobile robot was obtained by the substitution of the estimated parameters into the mathematical model. The transfer function of the mobile robot is applied to generate the root-locus diagram used for the estimation of the gains of the PID controller. The attitude control method including a PID controller, non-linear elements, and integral saturation prevention was designed and simulated. The experiment was conducted by applying the method to the mobile robot. In the attitude control experiment, the performance of attitude recovery from ±12° tilted initial state with a settling time of 0.98s and a percent overshoot of 40.1% was obtained. Furthermore, the attitude maintaining robustness against disturbance was verified.
Replacement of Analog Automatic Voltage Regulator using Digital Technology
Ersalina Werda Mukti;
Sulistyo Wijanarko;
Anwar Muqorobin
International Journal of Electrical and Computer Engineering (IJECE) Vol 6, No 1: February 2016
Publisher : Institute of Advanced Engineering and Science
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DOI: 10.11591/ijece.v6i1.pp53-62
Before the 90’s, many power plants in Indonesia were equipped with analog controllers and now those power plants are still in operation to produce electricity. One of those controller parts is Automatic Voltage Regulator (AVR). If a failure occurs in the AVR, the economic solution is by replacing the damaged electronic component with new component. However this method will not solve the problem if the components are not available in local market or become obsolete. Purchasing the new AVR that compatible with other controller parts cannot be done again because the analog controllers are no longer produced by the vendor. Furthermore, replacement of all the controllers with the current technology become expensive. According to this, an alternative solution is proposed in this paper by designing an AVR that compatible with other controller parts and considering the availability of the electronic components in local market. ATmega8 microcontroller is used to implement a digital AVR and employing op amp based as its signal conditioning. The result shows that the digital AVR can reduce hardware size and power consumption. The digital AVR also meets the computation rate of the computation signal.
Modelling of E-Governance Framework for Mining Knowledge from Massive Grievance Redressal Data
Sangeetha G;
L. Manjunatha Rao
International Journal of Electrical and Computer Engineering (IJECE) Vol 6, No 1: February 2016
Publisher : Institute of Advanced Engineering and Science
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DOI: 10.11591/ijece.v6i1.pp367-374
With the massive proliferation of online applications for the citizens with abundant resources, there is a tremendous hike in usage of e-governance platforms. Right from entrepreneur, players, politicians, students, or anyone who are highly depending on web-based grievance redressal networking sites, which generates loads of massive grievance data that are not only challenging but also highly impossible to understand. The prime reason behind this is grievance data is massive in size and they are highly unstructured. Because of this fact, the proposed system attempts to understand the possibility of performing knowledge discovery process from grievance Data using conventional data mining algorithms. Designed in Java considering massive number of online e-governance framework from civilian’s grievance discussion forums, the proposed system evaluates the effectiveness of performing datamining for Big data.